[PATCH] D60456: [RISCV] Hard float ABI support

rjmccall added a comment. Herald added subscribers: vkmr, frasercrmck, evandro, luismarques, sameer.abuasal, s.egerton. Your use of CoerceAndExpand seems fine; thanks for pinging me on it Repository: rL LLVM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60456/new/

[PATCH] D60456: [RISCV] Hard float ABI support

This revision was automatically updated to reflect the committed changes. Closed by commit rL366450: [RISCV] Hard float ABI support (authored by asb, committed by ). Herald added a project: LLVM. Herald added a subscriber: llvm-commits. Changed prior to commit:

[PATCH] D60456: [RISCV] Hard float ABI support

rjmccall accepted this revision. rjmccall added a comment. This revision is now accepted and ready to land. Yes, I think you can commit. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60456/new/ https://reviews.llvm.org/D60456 ___

[PATCH] D60456: [RISCV] Hard float ABI support

asb added a comment. Thanks for the careful review John, I really appreciate it! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60456/new/ https://reviews.llvm.org/D60456 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D60456: [RISCV] Hard float ABI support

asb added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:9236 +if (IsInt && Field1Ty && Field1Ty->isIntegerTy()) + return false; +if (!Field1Ty) { rjmccall wrote: > asb wrote: > > rjmccall wrote: > > > The comment here is wrong

[PATCH] D60456: [RISCV] Hard float ABI support

asb updated this revision to Diff 208477. asb marked 4 inline comments as done. asb added a comment. Tweaked a code comment. Just to confirm, @rjmccall are you happy for me to commit this? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D60456/new/ https://reviews.llvm.org/D60456 Files:

[PATCH] D60456: [RISCV] Hard float ABI support

rjmccall added a comment. I'm fine with proceeding with your best guess about what the ABI should be. Comment at: clang/lib/CodeGen/TargetInfo.cpp:9232 +if (IsFloat && Size > FLen) + return false; +// Can't be eligible if an integer type was already found (only

[PATCH] D60456: [RISCV] Hard float ABI support

rogfer01 added a comment. > As noted in another comment, it's not entirely clear what zero-width bitfield > behaviour to match (see here > ) > as GCC seems buggy and the ABI is under-specified. Ideally I'd like to

[PATCH] D60456: [RISCV] Hard float ABI support

asb updated this revision to Diff 208392. asb marked an inline comment as done. asb added a comment. Updated to address comment typo picked up by @rogfer01 (thanks!). As noted in another comment, it's not entirely clear what zero-width bitfield behaviour to match (see here

[PATCH] D60456: [RISCV] Hard float ABI support

asb marked an inline comment as done. asb added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:9352 +return false; + // As a quirk of the ABI, zero-width bitfields aren't ignored for fp+fp + // or int+fp structs, but are ignored for a struct with

[PATCH] D60456: [RISCV] Hard float ABI support

asb updated this revision to Diff 208308. asb marked 7 inline comments as done. asb retitled this revision from "[RISCV][WIP/RFC] Hard float ABI support" to "[RISCV] Hard float ABI support". asb edited the summary of this revision. asb added a comment. Herald added subscribers: lenary, Jim,

[PATCH] D60456: [RISCV] Hard float ABI support

asb added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:9232 +if (IsFloat && Size > FLen) + return false; +// Can't be eligible if an integer type was already found (only fp+int or rjmccall wrote: > Is this the only consideration for

[PATCH] D60456: [RISCV] Hard float ABI support

rogfer01 added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:9352 +return false; + // As a quirk of the ABI, zero-width bitfields aren't ignored for fp+fp + // or int+fp structs, but are ignored for a struct with an fp field and