amyk marked 2 inline comments as done.
amyk added inline comments.
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:79
+vector signed int test_vec_dive_si(void) {
+ // CHECK: @llvm.ppc.altivec.vdivesw(<4 x i32>
+ // CHECK-NEXT: ret <4 x i32>
lei wrote:
>
lei added inline comments.
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:79
+vector signed int test_vec_dive_si(void) {
+ // CHECK: @llvm.ppc.altivec.vdivesw(<4 x i32>
+ // CHECK-NEXT: ret <4 x i32>
why does the ck stops matching at the first param?
amyk updated this revision to Diff 274680.
amyk edited the summary of this revision.
amyk added a parent revision: D82576: [PowerPC][Power10] Implement low-order
Vector Modulus Builtins, and add Vector Multiply/Divide/Modulus Builtins Tests.
amyk added a comment.
Rebase patch, remove MC tests fro
amyk updated this revision to Diff 273578.
amyk added a comment.
Addressed Anil's comments.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82609/new/
https://reviews.llvm.org/D82609
Files:
clang/include/clang/Basic/BuiltinsPPC.def
clang/lib/Headers/altivec.h
clang/test/CodeGen/bui
amyk marked 2 inline comments as done.
amyk added inline comments.
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:18
+ // CHECK-NEXT: ret <4 x i32>
+ return vec_dive(vsia, vsib);
+}
anil9 wrote:
> I may be wrong but where are the variables declared ? I
anil9 added inline comments.
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:18
+ // CHECK-NEXT: ret <4 x i32>
+ return vec_dive(vsia, vsib);
+}
I may be wrong but where are the variables declared ? I do not see the
variables delclared above in the fil
amyk created this revision.
amyk added reviewers: power-llvm-team, PowerPC, nemanjai, lei, saghir.
amyk added projects: LLVM, clang, PowerPC.
Herald added subscribers: shchenz, hiraditya.
This patch implements the following function prototypes to utilize the
`vmulh[s|u][w|d]` and `vdive[s|u][w|d]
