[PATCH] D83516: [PowerPC][Power10] 128-bit Binary Integer Operation instruction definitions and MC Tests

2020-07-16 Thread Amy Kwan via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGc2735635523d: [PowerPC][Power10] Add 128-bit Binary Integer Operation instruction definitions… (authored by Conanap, committed by amyk). Changed prior to commit: https://reviews.llvm.org/D83516?vs=27744

[PATCH] D83516: [PowerPC][Power10] 128-bit Binary Integer Operation instruction definitions and MC Tests

2020-07-15 Thread Amy Kwan via Phabricator via cfe-commits
amyk accepted this revision. amyk added a comment. LGTM. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83516/new/ https://reviews.llvm.org/D83516 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D83516: [PowerPC][Power10] 128-bit Binary Integer Operation instruction definitions and MC Tests

2020-07-13 Thread Albion Fung via Phabricator via cfe-commits
Conanap updated this revision to Diff 277442. Conanap marked an inline comment as done. Conanap added a comment. Some formatting changes Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D83516/new/ https://reviews.llvm.org/D83516 Files: llvm/lib/Tar

[PATCH] D83516: [PowerPC][Power10] 128-bit Binary Integer Operation instruction definitions and MC Tests

2020-07-10 Thread Lei Huang via Phabricator via cfe-commits
lei accepted this revision. lei added a comment. This revision is now accepted and ready to land. LGTM Please address the nits on commit. Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:1022 + def XSCVUQQP : X_VT5_XO5_VB5<63, 3, 836, "xscvuqqp", []>; + def XSCVSQQP: X_V