[PATCH] D97777: Add __builtin_isnan(__fp16) testcase
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG52bfe6605ab7: Add __builtin_isnan(__fp16) testcase (authored by thopre). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D9/new/ https://reviews.llvm.org/D9 Files: clang/test/CodeGen/strictfp_builtins.c Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -o - -triple x86_64-unknown-unknown | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -fallow-half-arguments-and-returns -o - -triple x86_64-unknown-unknown | FileCheck %s // Test that the constrained intrinsics are picking up the exception // metadata from the AST instead of the global default from the command line. @@ -92,6 +92,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:ret void +// +void test_fp16_isnan(__fp16 h) { + P(isnan, (h)); + + return; +} + // CHECK-LABEL: @test_float_isnan( // CHECK-NEXT: entry: // CHECK-NEXT:[[F_ADDR:%.*]] = alloca float, align 4 @@ -101,7 +120,7 @@ // CHECK-NEXT:[[ABS:%.*]] = and i32 [[BITCAST]], [[#%u,0x7FFF]] // CHECK-NEXT:[[TMP1:%.*]] = sub i32 [[#%u,0x7F80]], [[ABS]] // CHECK-NEXT:[[ISNAN:%.*]] = lshr i32 [[TMP1]], 31 -// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0), i32 [[ISNAN]]) [[ATTR4]] +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.5, i64 0, i64 0), i32 [[ISNAN]]) [[ATTR4]] // CHECK-NEXT:ret void // void test_float_isnan(float f) { @@ -120,7 +139,7 @@ // CHECK-NEXT:[[TMP1:%.*]] = sub i64 [[#%u,0x7FF0]], [[ABS]] // CHECK-NEXT:[[ISNAN:%.*]] = lshr i64 [[TMP1]], 63 // CHECK-NEXT:[[RES:%.*]] = trunc i64 [[ISNAN]] to i32 -// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.5, i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.6, i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT:ret void // void test_double_isnan(double d) { @@ -141,7 +160,7 @@ // CHECK-NEXT:[[AND:%.*]] = and i1 [[ISEQ]], [[ISINF]] // CHECK-NEXT:[[AND1:%.*]] = and i1 [[AND]], [[ISNORMAL]] // CHECK-NEXT:[[TMP2:%.*]] = zext i1 [[AND1]] to i32 -// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.6, i64 0, i64 0), i32 [[TMP2]]) [[ATTR4]] +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.7, i64 0, i64 0), i32 [[TMP2]]) [[ATTR4]] // CHECK-NEXT:ret void // void test_isnormal(double d) { Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -o - -triple x86_64-unknown-unknown | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -fallow-half-arguments-and-returns -o - -triple x86_64-unknown-unknown | FileCheck %s // Test that the constrained intrinsics are picking up the exception // metadata from the AST instead of the global default from the command line. @@ -92,6 +92,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext
[PATCH] D97777: Add __builtin_isnan(__fp16) testcase
thopre updated this revision to Diff 328130. thopre added a comment. Adapt to revert of __builtin_isinf Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D9/new/ https://reviews.llvm.org/D9 Files: clang/test/CodeGen/strictfp_builtins.c Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -o - -triple x86_64-unknown-unknown | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -fallow-half-arguments-and-returns -o - -triple x86_64-unknown-unknown | FileCheck %s // Test that the constrained intrinsics are picking up the exception // metadata from the AST instead of the global default from the command line. @@ -92,6 +92,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:ret void +// +void test_fp16_isnan(__fp16 h) { + P(isnan, (h)); + + return; +} + // CHECK-LABEL: @test_float_isnan( // CHECK-NEXT: entry: // CHECK-NEXT:[[F_ADDR:%.*]] = alloca float, align 4 @@ -101,7 +120,7 @@ // CHECK-NEXT:[[ABS:%.*]] = and i32 [[BITCAST]], [[#%u,0x7FFF]] // CHECK-NEXT:[[TMP1:%.*]] = sub i32 [[#%u,0x7F80]], [[ABS]] // CHECK-NEXT:[[ISNAN:%.*]] = lshr i32 [[TMP1]], 31 -// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0, i64 0), i32 [[ISNAN]]) [[ATTR4]] +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.5, i64 0, i64 0), i32 [[ISNAN]]) [[ATTR4]] // CHECK-NEXT:ret void // void test_float_isnan(float f) { @@ -120,7 +139,7 @@ // CHECK-NEXT:[[TMP1:%.*]] = sub i64 [[#%u,0x7FF0]], [[ABS]] // CHECK-NEXT:[[ISNAN:%.*]] = lshr i64 [[TMP1]], 63 // CHECK-NEXT:[[RES:%.*]] = trunc i64 [[ISNAN]] to i32 -// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.5, i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.6, i64 0, i64 0), i32 [[RES]]) [[ATTR4]] // CHECK-NEXT:ret void // void test_double_isnan(double d) { @@ -141,7 +160,7 @@ // CHECK-NEXT:[[AND:%.*]] = and i1 [[ISEQ]], [[ISINF]] // CHECK-NEXT:[[AND1:%.*]] = and i1 [[AND]], [[ISNORMAL]] // CHECK-NEXT:[[TMP2:%.*]] = zext i1 [[AND1]] to i32 -// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.6, i64 0, i64 0), i32 [[TMP2]]) [[ATTR4]] +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str.7, i64 0, i64 0), i32 [[TMP2]]) [[ATTR4]] // CHECK-NEXT:ret void // void test_isnormal(double d) { Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -o - -triple x86_64-unknown-unknown | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -ffp-exception-behavior=maytrap -fallow-half-arguments-and-returns -o - -triple x86_64-unknown-unknown | FileCheck %s // Test that the constrained intrinsics are picking up the exception // metadata from the AST instead of the global default from the command line. @@ -92,6 +92,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.4, i64 0,
[PATCH] D97777: Add __builtin_isnan(__fp16) testcase
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGe77b5c40d576: Add __builtin_isnan(__fp16) testcase (authored by thopre). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D9/new/ https://reviews.llvm.org/D9 Files: clang/test/CodeGen/strictfp_builtins.c Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -129,6 +129,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:ret void +// +void test_fp16_isnan(__fp16 h) { + P(isnan, (h)); + + return; +} + // CHECK-LABEL: @test_float_isnan( // CHECK-NEXT: entry: // CHECK-NEXT:[[F_ADDR:%.*]] = alloca float, align 4 Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -129,6 +129,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:ret void +// +void test_fp16_isnan(__fp16 h) { + P(isnan, (h)); + + return; +} + // CHECK-LABEL: @test_float_isnan( // CHECK-NEXT: entry: // CHECK-NEXT:[[F_ADDR:%.*]] = alloca float, align 4 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D97777: Add __builtin_isnan(__fp16) testcase
rjmccall accepted this revision. rjmccall added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D9/new/ https://reviews.llvm.org/D9 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[PATCH] D97777: Add __builtin_isnan(__fp16) testcase
thopre created this revision. thopre added reviewers: mibintc, kpn, efriedma, sepavloff, rjmccall, jonpa. thopre requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D9 Files: clang/test/CodeGen/strictfp_builtins.c Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -129,6 +129,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:ret void +// +void test_fp16_isnan(__fp16 h) { + P(isnan, (h)); + + return; +} + // CHECK-LABEL: @test_float_isnan( // CHECK-NEXT: entry: // CHECK-NEXT:[[F_ADDR:%.*]] = alloca float, align 4 Index: clang/test/CodeGen/strictfp_builtins.c === --- clang/test/CodeGen/strictfp_builtins.c +++ clang/test/CodeGen/strictfp_builtins.c @@ -129,6 +129,25 @@ return; } +// CHECK-LABEL: @test_fp16_isnan( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[H_ADDR:%.*]] = alloca half, align 2 +// CHECK-NEXT:store half [[H:%.*]], half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[TMP0:%.*]] = load half, half* [[H_ADDR]], align 2 +// CHECK-NEXT:[[BITCAST:%.*]] = bitcast half [[TMP0]] to i16 +// CHECK-NEXT:[[ABS:%.*]] = and i16 [[BITCAST]], [[#%u,0x7FFF]] +// CHECK-NEXT:[[TMP1:%.*]] = sub i16 [[#%u,0x7C00]], [[ABS]] +// CHECK-NEXT:[[ISNAN:%.*]] = lshr i16 [[TMP1]], 15 +// CHECK-NEXT:[[RES:%.*]] = zext i16 [[ISNAN]] to i32 +// CHECK-NEXT:call void @p(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str.[[#STRID:STRID+1]], i64 0, i64 0), i32 [[RES]]) [[ATTR4]] +// CHECK-NEXT:ret void +// +void test_fp16_isnan(__fp16 h) { + P(isnan, (h)); + + return; +} + // CHECK-LABEL: @test_float_isnan( // CHECK-NEXT: entry: // CHECK-NEXT:[[F_ADDR:%.*]] = alloca float, align 4 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits