https://github.com/preames closed
https://github.com/llvm/llvm-project/pull/79911
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mehnadnerd wrote:
It has been approved to be pursued as a fast track extension
(https://lists.riscv.org/g/tech-unprivileged/topic/arc_architecture_review/101951698).
It has not yet been approved by the chairs.
https://github.com/llvm/llvm-project/pull/79911
preames wrote:
I think we need some kind of official documentation to merge this. I went
looking to see if I could find mention of this extension in e.g. ARC notes, and
didn't find it. @mehnadnerd can you provide some kind of link or reference to
some RVI source indicating the status of
wangpc-pp wrote:
What's the status of Zalasr extension? Is it an official extension now?
https://github.com/llvm/llvm-project/pull/79911
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https://github.com/mehnadnerd updated
https://github.com/llvm/llvm-project/pull/79911
>From 3344e42d05875269b680b9626cd6cd093e88d81e Mon Sep 17 00:00:00 2001
From: brs
Date: Thu, 19 Oct 2023 17:16:45 -0500
Subject: [PATCH] [RISCV][MC] MC layer support for the experimental zalasr
extension
@@ -797,6 +797,13 @@ def FeatureStdExtSvpbmt
: SubtargetFeature<"svpbmt", "HasStdExtSvpbmt", "true",
"'Svpbmt' (Page-Based Memory Types)">;
+def FeatureStdExtZalasr
tclin914 wrote:
Could we put this definition after Zacas.
https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/79911
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https://github.com/mehnadnerd updated
https://github.com/llvm/llvm-project/pull/79911
>From bfa9b7043d89de78e66f5073c3b34b66defdc2f4 Mon Sep 17 00:00:00 2001
From: brs
Date: Thu, 19 Oct 2023 17:16:45 -0500
Subject: [PATCH] [RISCV][MC] MC layer support for the experimental zalasr
extension
@@ -0,0 +1,70 @@
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zalasr
-riscv-no-aliases -show-encoding \
topperc wrote:
It's not very obvious from the test names, but I think the convention for the
`-valid.s` tests is usually that the `rv32` test
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+//
@@ -145,6 +145,7 @@
// CHECK-NOT: __riscv_zacas {{.*$}}
// CHECK-NOT: __riscv_zalrsc {{.*$}}
// CHECK-NOT: __riscv_zcmop {{.*$}}
+// CHECK-NOT: __riscv_zalasr {{.*$}}
mehnadnerd wrote:
Done, there was another place in the same file I fixed
https://github.com/mehnadnerd updated
https://github.com/llvm/llvm-project/pull/79911
>From 1612df14bf52085ed1dd1a1c815a0515930c9d6e Mon Sep 17 00:00:00 2001
From: brs
Date: Thu, 19 Oct 2023 17:16:45 -0500
Subject: [PATCH] [RISCV][MC] MC layer support for the experimental zalasr
extension
@@ -145,6 +145,7 @@
// CHECK-NOT: __riscv_zacas {{.*$}}
// CHECK-NOT: __riscv_zalrsc {{.*$}}
// CHECK-NOT: __riscv_zcmop {{.*$}}
+// CHECK-NOT: __riscv_zalasr {{.*$}}
topperc wrote:
this list is roughly in alphabetical order, can you alphabetize zalasr above
https://github.com/mehnadnerd updated
https://github.com/llvm/llvm-project/pull/79911
>From 7f60b4aae0d75aabad7ecf159a7cd09420af6998 Mon Sep 17 00:00:00 2001
From: brs
Date: Thu, 19 Oct 2023 17:16:45 -0500
Subject: [PATCH] [RISCV][MC] MC layer support for the experimental zalasr
extension
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+//
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+//
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+//
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+//
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+//
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Brendan Sweeney (mehnadnerd)
Changes
This PR implements the RISC-V Atomic Load-Acquire and Store-Release Extension
(Zalasr).
See also https://github.com/mehnadnerd/riscv-zalasr.
This PR replaces
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Thank you for submitting a Pull Request (PR) to the LLVM Project!
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https://github.com/mehnadnerd created
https://github.com/llvm/llvm-project/pull/79911
This PR implements the RISC-V Atomic Load-Acquire and Store-Release Extension
(Zalasr).
See also https://github.com/mehnadnerd/riscv-zalasr.
This PR replaces https://github.com/llvm/llvm-project/pull/69685
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