Re: r294176 - [AVR] Add support for the full set of inline asm constraints

[Chandler Carruth via cfe-commits]

This was due to r340519. I've fixed it in r340596 to clean things up.

On Thu, Aug 23, 2018 at 8:20 PM Chandler Carruth 
wrote:

> Trying new address again...
>
>
> On Thu, Aug 23, 2018 at 8:17 PM Chandler Carruth 
> wrote:
>
>> Sorry for ancient thread revival, but...
>>
>> On Mon, Feb 6, 2017 at 2:10 AM Dylan McKay via cfe-commits <
>> cfe-commits@lists.llvm.org> wrote:
>>
>>> Author: dylanmckay
>>> Date: Mon Feb  6 03:01:59 2017
>>> New Revision: 294176
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=294176=rev
>>> Log:
>>> [AVR] Add support for the full set of inline asm constraints
>>>
>>> Summary:
>>> Previously the method would simply return false, causing every single
>>> inline assembly constraint to trigger a compile error.
>>>
>>> This adds inline assembly constraint support for the AVR target.
>>>
>>> This patch is derived from the code in
>>> AVRISelLowering::getConstraintType.
>>>
>>> More details can be found on the AVR-GCC reference wiki
>>> http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
>>>
>>> Reviewers: jroelofs, asl
>>>
>>> Reviewed By: asl
>>>
>>> Subscribers: asl, ahatanak, saaadhu, cfe-commits
>>>
>>> Differential Revision: https://reviews.llvm.org/D28344
>>>
>>> Added:
>>> cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
>>>
>>
>> This test is currently failing. Can you look at fixing it?
>>
>>
>>
>>> cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c
>>> Modified:
>>> cfe/trunk/lib/Basic/Targets.cpp
>>>
>>> Modified: cfe/trunk/lib/Basic/Targets.cpp
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294176=294175=294176=diff
>>>
>>> ==
>>> --- cfe/trunk/lib/Basic/Targets.cpp (original)
>>> +++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb  6 03:01:59 2017
>>> @@ -8517,6 +8517,57 @@ public:
>>>
>>>bool validateAsmConstraint(const char *,
>>>   TargetInfo::ConstraintInfo ) const
>>> override {
>>> +// There aren't any multi-character AVR specific constraints.
>>> +if (StringRef(Name).size() > 1) return false;
>>> +
>>> +switch (*Name) {
>>> +  default: return false;
>>> +  case 'a': // Simple upper registers
>>> +  case 'b': // Base pointer registers pairs
>>> +  case 'd': // Upper register
>>> +  case 'l': // Lower registers
>>> +  case 'e': // Pointer register pairs
>>> +  case 'q': // Stack pointer register
>>> +  case 'r': // Any register
>>> +  case 'w': // Special upper register pairs
>>> +  case 't': // Temporary register
>>> +  case 'x': case 'X': // Pointer register pair X
>>> +  case 'y': case 'Y': // Pointer register pair Y
>>> +  case 'z': case 'Z': // Pointer register pair Z
>>> +Info.setAllowsRegister();
>>> +return true;
>>> +  case 'I': // 6-bit positive integer constant
>>> +Info.setRequiresImmediate(0, 63);
>>> +return true;
>>> +  case 'J': // 6-bit negative integer constant
>>> +Info.setRequiresImmediate(-63, 0);
>>> +return true;
>>> +  case 'K': // Integer constant (Range: 2)
>>> +Info.setRequiresImmediate(2);
>>> +return true;
>>> +  case 'L': // Integer constant (Range: 0)
>>> +Info.setRequiresImmediate(0);
>>> +return true;
>>> +  case 'M': // 8-bit integer constant
>>> +Info.setRequiresImmediate(0, 0xff);
>>> +return true;
>>> +  case 'N': // Integer constant (Range: -1)
>>> +Info.setRequiresImmediate(-1);
>>> +return true;
>>> +  case 'O': // Integer constant (Range: 8, 16, 24)
>>> +Info.setRequiresImmediate({8, 16, 24});
>>> +return true;
>>> +  case 'P': // Integer constant (Range: 1)
>>> +Info.setRequiresImmediate(1);
>>> +return true;
>>> +  case 'R': // Integer constant (Range: -6 to 5)
>>> +Info.setRequiresImmediate(-6, 5);
>>> +return true;
>>> +  case 'G': // Floating point constant
>>> +  case 'Q': // A memory address based on Y or Z pointer with
>>> displacement.
>>> +return true;
>>> +}
>>> +
>>>  return false;
>>>}
>>>
>>>
>>> Added: cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
>>> URL:
>>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c?rev=294176=auto
>>>
>>> ==
>>> --- cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c (added)
>>> +++ cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c Mon Feb  6
>>> 03:01:59 2017
>>> @@ -0,0 +1,124 @@
>>> +// REQUIRES: avr-registered-target
>>> +// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s |
>>> FileCheck %s
>>> +
>>> +int data;
>>> +
>>> +void a() {
>>> +  // CHECK: call void asm sideeffect "add r5, $0", "a"(i16 %0)
>>> +  asm("add r5, %0" :: "a"(data));
>>> +}
>>> +
>>> +void b() {
>>> +  // CHECK: call 

Re: r294176 - [AVR] Add support for the full set of inline asm constraints

[Chandler Carruth via cfe-commits]

Trying new address again...

On Thu, Aug 23, 2018 at 8:17 PM Chandler Carruth 
wrote:

> Sorry for ancient thread revival, but...
>
> On Mon, Feb 6, 2017 at 2:10 AM Dylan McKay via cfe-commits <
> cfe-commits@lists.llvm.org> wrote:
>
>> Author: dylanmckay
>> Date: Mon Feb  6 03:01:59 2017
>> New Revision: 294176
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=294176=rev
>> Log:
>> [AVR] Add support for the full set of inline asm constraints
>>
>> Summary:
>> Previously the method would simply return false, causing every single
>> inline assembly constraint to trigger a compile error.
>>
>> This adds inline assembly constraint support for the AVR target.
>>
>> This patch is derived from the code in
>> AVRISelLowering::getConstraintType.
>>
>> More details can be found on the AVR-GCC reference wiki
>> http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
>>
>> Reviewers: jroelofs, asl
>>
>> Reviewed By: asl
>>
>> Subscribers: asl, ahatanak, saaadhu, cfe-commits
>>
>> Differential Revision: https://reviews.llvm.org/D28344
>>
>> Added:
>> cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
>>
>
> This test is currently failing. Can you look at fixing it?
>
>
>
>> cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c
>> Modified:
>> cfe/trunk/lib/Basic/Targets.cpp
>>
>> Modified: cfe/trunk/lib/Basic/Targets.cpp
>> URL:
>> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294176=294175=294176=diff
>>
>> ==
>> --- cfe/trunk/lib/Basic/Targets.cpp (original)
>> +++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb  6 03:01:59 2017
>> @@ -8517,6 +8517,57 @@ public:
>>
>>bool validateAsmConstraint(const char *,
>>   TargetInfo::ConstraintInfo ) const
>> override {
>> +// There aren't any multi-character AVR specific constraints.
>> +if (StringRef(Name).size() > 1) return false;
>> +
>> +switch (*Name) {
>> +  default: return false;
>> +  case 'a': // Simple upper registers
>> +  case 'b': // Base pointer registers pairs
>> +  case 'd': // Upper register
>> +  case 'l': // Lower registers
>> +  case 'e': // Pointer register pairs
>> +  case 'q': // Stack pointer register
>> +  case 'r': // Any register
>> +  case 'w': // Special upper register pairs
>> +  case 't': // Temporary register
>> +  case 'x': case 'X': // Pointer register pair X
>> +  case 'y': case 'Y': // Pointer register pair Y
>> +  case 'z': case 'Z': // Pointer register pair Z
>> +Info.setAllowsRegister();
>> +return true;
>> +  case 'I': // 6-bit positive integer constant
>> +Info.setRequiresImmediate(0, 63);
>> +return true;
>> +  case 'J': // 6-bit negative integer constant
>> +Info.setRequiresImmediate(-63, 0);
>> +return true;
>> +  case 'K': // Integer constant (Range: 2)
>> +Info.setRequiresImmediate(2);
>> +return true;
>> +  case 'L': // Integer constant (Range: 0)
>> +Info.setRequiresImmediate(0);
>> +return true;
>> +  case 'M': // 8-bit integer constant
>> +Info.setRequiresImmediate(0, 0xff);
>> +return true;
>> +  case 'N': // Integer constant (Range: -1)
>> +Info.setRequiresImmediate(-1);
>> +return true;
>> +  case 'O': // Integer constant (Range: 8, 16, 24)
>> +Info.setRequiresImmediate({8, 16, 24});
>> +return true;
>> +  case 'P': // Integer constant (Range: 1)
>> +Info.setRequiresImmediate(1);
>> +return true;
>> +  case 'R': // Integer constant (Range: -6 to 5)
>> +Info.setRequiresImmediate(-6, 5);
>> +return true;
>> +  case 'G': // Floating point constant
>> +  case 'Q': // A memory address based on Y or Z pointer with
>> displacement.
>> +return true;
>> +}
>> +
>>  return false;
>>}
>>
>>
>> Added: cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
>> URL:
>> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c?rev=294176=auto
>>
>> ==
>> --- cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c (added)
>> +++ cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c Mon Feb  6
>> 03:01:59 2017
>> @@ -0,0 +1,124 @@
>> +// REQUIRES: avr-registered-target
>> +// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s |
>> FileCheck %s
>> +
>> +int data;
>> +
>> +void a() {
>> +  // CHECK: call void asm sideeffect "add r5, $0", "a"(i16 %0)
>> +  asm("add r5, %0" :: "a"(data));
>> +}
>> +
>> +void b() {
>> +  // CHECK: call void asm sideeffect "add r5, $0", "b"(i16 %0)
>> +  asm("add r5, %0" :: "b"(data));
>> +}
>> +
>> +void d() {
>> +  // CHECK: call void asm sideeffect "add r5, $0", "d"(i16 %0)
>> +  asm("add r5, %0" :: "d"(data));
>> +}
>> +
>> +void l() {
>> +  // CHECK: call void asm 

Re: r294176 - [AVR] Add support for the full set of inline asm constraints

[Chandler Carruth via cfe-commits]

Sorry for ancient thread revival, but...

On Mon, Feb 6, 2017 at 2:10 AM Dylan McKay via cfe-commits <
cfe-commits@lists.llvm.org> wrote:

> Author: dylanmckay
> Date: Mon Feb  6 03:01:59 2017
> New Revision: 294176
>
> URL: http://llvm.org/viewvc/llvm-project?rev=294176=rev
> Log:
> [AVR] Add support for the full set of inline asm constraints
>
> Summary:
> Previously the method would simply return false, causing every single
> inline assembly constraint to trigger a compile error.
>
> This adds inline assembly constraint support for the AVR target.
>
> This patch is derived from the code in
> AVRISelLowering::getConstraintType.
>
> More details can be found on the AVR-GCC reference wiki
> http://www.nongnu.org/avr-libc/user-manual/inline_asm.html
>
> Reviewers: jroelofs, asl
>
> Reviewed By: asl
>
> Subscribers: asl, ahatanak, saaadhu, cfe-commits
>
> Differential Revision: https://reviews.llvm.org/D28344
>
> Added:
> cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
>

This test is currently failing. Can you look at fixing it?



> cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c
> Modified:
> cfe/trunk/lib/Basic/Targets.cpp
>
> Modified: cfe/trunk/lib/Basic/Targets.cpp
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294176=294175=294176=diff
>
> ==
> --- cfe/trunk/lib/Basic/Targets.cpp (original)
> +++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb  6 03:01:59 2017
> @@ -8517,6 +8517,57 @@ public:
>
>bool validateAsmConstraint(const char *,
>   TargetInfo::ConstraintInfo ) const
> override {
> +// There aren't any multi-character AVR specific constraints.
> +if (StringRef(Name).size() > 1) return false;
> +
> +switch (*Name) {
> +  default: return false;
> +  case 'a': // Simple upper registers
> +  case 'b': // Base pointer registers pairs
> +  case 'd': // Upper register
> +  case 'l': // Lower registers
> +  case 'e': // Pointer register pairs
> +  case 'q': // Stack pointer register
> +  case 'r': // Any register
> +  case 'w': // Special upper register pairs
> +  case 't': // Temporary register
> +  case 'x': case 'X': // Pointer register pair X
> +  case 'y': case 'Y': // Pointer register pair Y
> +  case 'z': case 'Z': // Pointer register pair Z
> +Info.setAllowsRegister();
> +return true;
> +  case 'I': // 6-bit positive integer constant
> +Info.setRequiresImmediate(0, 63);
> +return true;
> +  case 'J': // 6-bit negative integer constant
> +Info.setRequiresImmediate(-63, 0);
> +return true;
> +  case 'K': // Integer constant (Range: 2)
> +Info.setRequiresImmediate(2);
> +return true;
> +  case 'L': // Integer constant (Range: 0)
> +Info.setRequiresImmediate(0);
> +return true;
> +  case 'M': // 8-bit integer constant
> +Info.setRequiresImmediate(0, 0xff);
> +return true;
> +  case 'N': // Integer constant (Range: -1)
> +Info.setRequiresImmediate(-1);
> +return true;
> +  case 'O': // Integer constant (Range: 8, 16, 24)
> +Info.setRequiresImmediate({8, 16, 24});
> +return true;
> +  case 'P': // Integer constant (Range: 1)
> +Info.setRequiresImmediate(1);
> +return true;
> +  case 'R': // Integer constant (Range: -6 to 5)
> +Info.setRequiresImmediate(-6, 5);
> +return true;
> +  case 'G': // Floating point constant
> +  case 'Q': // A memory address based on Y or Z pointer with
> displacement.
> +return true;
> +}
> +
>  return false;
>}
>
>
> Added: cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c?rev=294176=auto
>
> ==
> --- cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c (added)
> +++ cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c Mon Feb  6
> 03:01:59 2017
> @@ -0,0 +1,124 @@
> +// REQUIRES: avr-registered-target
> +// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s |
> FileCheck %s
> +
> +int data;
> +
> +void a() {
> +  // CHECK: call void asm sideeffect "add r5, $0", "a"(i16 %0)
> +  asm("add r5, %0" :: "a"(data));
> +}
> +
> +void b() {
> +  // CHECK: call void asm sideeffect "add r5, $0", "b"(i16 %0)
> +  asm("add r5, %0" :: "b"(data));
> +}
> +
> +void d() {
> +  // CHECK: call void asm sideeffect "add r5, $0", "d"(i16 %0)
> +  asm("add r5, %0" :: "d"(data));
> +}
> +
> +void l() {
> +  // CHECK: call void asm sideeffect "add r5, $0", "l"(i16 %0)
> +  asm("add r5, %0" :: "l"(data));
> +}
> +
> +void e() {
> +  // CHECK: call void asm sideeffect "add r5, $0", "e"(i16 %0)
> +  asm("add r5, %0" :: "e"(data));
> +}
> +
> +void q() {
> +  // CHECK: 

r294176 - [AVR] Add support for the full set of inline asm constraints

[Dylan McKay via cfe-commits]

Author: dylanmckay
Date: Mon Feb  6 03:01:59 2017
New Revision: 294176

URL: http://llvm.org/viewvc/llvm-project?rev=294176=rev
Log:
[AVR] Add support for the full set of inline asm constraints

Summary:
Previously the method would simply return false, causing every single
inline assembly constraint to trigger a compile error.

This adds inline assembly constraint support for the AVR target.

This patch is derived from the code in
AVRISelLowering::getConstraintType.

More details can be found on the AVR-GCC reference wiki
http://www.nongnu.org/avr-libc/user-manual/inline_asm.html

Reviewers: jroelofs, asl

Reviewed By: asl

Subscribers: asl, ahatanak, saaadhu, cfe-commits

Differential Revision: https://reviews.llvm.org/D28344

Added:
cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
cfe/trunk/test/CodeGen/avr-unsupported-inline-asm-constraints.c
Modified:
cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=294176=294175=294176=diff
==
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Mon Feb  6 03:01:59 2017
@@ -8517,6 +8517,57 @@ public:
 
   bool validateAsmConstraint(const char *,
  TargetInfo::ConstraintInfo ) const override {
+// There aren't any multi-character AVR specific constraints.
+if (StringRef(Name).size() > 1) return false;
+
+switch (*Name) {
+  default: return false;
+  case 'a': // Simple upper registers
+  case 'b': // Base pointer registers pairs
+  case 'd': // Upper register
+  case 'l': // Lower registers
+  case 'e': // Pointer register pairs
+  case 'q': // Stack pointer register
+  case 'r': // Any register
+  case 'w': // Special upper register pairs
+  case 't': // Temporary register
+  case 'x': case 'X': // Pointer register pair X
+  case 'y': case 'Y': // Pointer register pair Y
+  case 'z': case 'Z': // Pointer register pair Z
+Info.setAllowsRegister();
+return true;
+  case 'I': // 6-bit positive integer constant
+Info.setRequiresImmediate(0, 63);
+return true;
+  case 'J': // 6-bit negative integer constant
+Info.setRequiresImmediate(-63, 0);
+return true;
+  case 'K': // Integer constant (Range: 2)
+Info.setRequiresImmediate(2);
+return true;
+  case 'L': // Integer constant (Range: 0)
+Info.setRequiresImmediate(0);
+return true;
+  case 'M': // 8-bit integer constant
+Info.setRequiresImmediate(0, 0xff);
+return true;
+  case 'N': // Integer constant (Range: -1)
+Info.setRequiresImmediate(-1);
+return true;
+  case 'O': // Integer constant (Range: 8, 16, 24)
+Info.setRequiresImmediate({8, 16, 24});
+return true;
+  case 'P': // Integer constant (Range: 1)
+Info.setRequiresImmediate(1);
+return true;
+  case 'R': // Integer constant (Range: -6 to 5)
+Info.setRequiresImmediate(-6, 5);
+return true;
+  case 'G': // Floating point constant
+  case 'Q': // A memory address based on Y or Z pointer with displacement.
+return true;
+}
+
 return false;
   }
 

Added: cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c
URL: 
http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c?rev=294176=auto
==
--- cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c (added)
+++ cfe/trunk/test/CodeGen/avr-inline-asm-constraints.c Mon Feb  6 03:01:59 2017
@@ -0,0 +1,124 @@
+// REQUIRES: avr-registered-target
+// RUN: %clang_cc1 -triple avr-unknown-unknown -emit-llvm -o - %s | FileCheck 
%s
+
+int data;
+
+void a() {
+  // CHECK: call void asm sideeffect "add r5, $0", "a"(i16 %0)
+  asm("add r5, %0" :: "a"(data));
+}
+
+void b() {
+  // CHECK: call void asm sideeffect "add r5, $0", "b"(i16 %0)
+  asm("add r5, %0" :: "b"(data));
+}
+
+void d() {
+  // CHECK: call void asm sideeffect "add r5, $0", "d"(i16 %0)
+  asm("add r5, %0" :: "d"(data));
+}
+
+void l() {
+  // CHECK: call void asm sideeffect "add r5, $0", "l"(i16 %0)
+  asm("add r5, %0" :: "l"(data));
+}
+
+void e() {
+  // CHECK: call void asm sideeffect "add r5, $0", "e"(i16 %0)
+  asm("add r5, %0" :: "e"(data));
+}
+
+void q() {
+  // CHECK: call void asm sideeffect "add r5, $0", "q"(i16 %0)
+  asm("add r5, %0" :: "q"(data));
+}
+
+void r() {
+  // CHECK: call void asm sideeffect "add r5, $0", "r"(i16 %0)
+  asm("add r5, %0" :: "r"(data));
+}
+
+void w() {
+  // CHECK: call void asm sideeffect "add r5, $0", "w"(i16 %0)
+  asm("add r5, %0" :: "w"(data));
+}
+
+void t() {
+  // CHECK: call void asm sideeffect "add r5, $0", "t"(i16 %0)
+  asm("add r5, %0" :: "t"(data));
+}
+
+void x() {
+  // CHECK: call void