[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. In https://reviews.llvm.org/D45045#1189201, @vext01 wrote: > Hi, > > I've been experimenting some more with this patch. > > It seems to me that if a label is optimised away, but you've requested it be > preserved, then you get a DWARF label with a zero offset. Is that

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. Hi @vext01, It should be fixed in https://reviews.llvm.org/D50495. Please help me to confirm it in your environment. Thanks so much. :) Repository: rL LLVM https://reviews.llvm.org/D45045 ___ cfe-commits mailing list c

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. In https://reviews.llvm.org/D45045#1092697, @hans wrote: > This broke the Chromium build. I've uploaded a reproducer at > https://bugs.chromium.org/p/chromium/issues/detail?id=841170#c1 > > I'm guessing maybe a Clang bootstrap with debug info might also reproduce the

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. In https://reviews.llvm.org/D45045#1184313, @vext01 wrote: > Looks like this was backed out (reverted) yesterday. > > I'm really interested in inserting DILabels from LLVM in my research project, > so I hope it can be recovered. You could apply it locally. In most ca

[PATCH] D50226: [DebugInfo] Use DbgVariableIntrinsic as the base class of variables.

HsiangKai created this revision. HsiangKai added reviewers: aprantl, probinson, dblaikie. Herald added subscribers: cfe-commits, JDevlieghere. After refactoring DbgInfoIntrinsic class hierarchy, we use DbgVariableIntrinsic as the base class of variable debug info. In resolveTopLevelMetadata() in

[PATCH] D50226: [DebugInfo] Use DbgVariableIntrinsic as the base class of variables.

This revision was automatically updated to reflect the committed changes. Closed by commit rL338985: [DebugInfo] Use DbgVariableIntrinsic as the base class of variables. (authored by HsiangKai, committed by ). Herald added a subscriber: llvm-commits. Changed prior to commit: https://reviews.llv

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. In https://reviews.llvm.org/D45045#1247427, @vitalybuka wrote: > Reverted in r343183 > https://bugs.llvm.org/show_bug.cgi?id=39094 > > http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-autoconf/builds/29356/steps/build%20release%20tsan%20with%20clang/logs/stdi

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rC345009: [DebugInfo] Generate debug information for labels. (After fix PR39094) (authored by HsiangKai, committed by ). Ch

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. D54199 and D54465 have been accepted and landed. I have tested the revision with LLVM test and Clang test. They are all passed. Chromium build is also successful in my local environment. I think it is

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

This revision was not accepted when it landed; it landed in state "Needs Review". This revision was automatically updated to reflect the committed changes. Closed by commit rL352025: Reland r345009 "[DebugInfo] Generate debug information for labels." (authored by HsiangKai, committed by ). Chang

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. In https://reviews.llvm.org/D45045#1299507, @tyb0807 wrote: > Hello all, > > This commit has been reverted by https://reviews.llvm.org/rC345026. It was > reported that this broke the Chromium build (again). Have you had a look to > fix this, @HsiangKai? I have fixed

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. Fix the bug in https://reviews.llvm.org/D52927. Repository: rL LLVM https://reviews.llvm.org/D45045 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai updated this revision to Diff 142533. HsiangKai added a comment. Update test cases. Repository: rC Clang https://reviews.llvm.org/D45045 Files: lib/CodeGen/CGDebugInfo.cpp lib/CodeGen/CGDebugInfo.h lib/CodeGen/CGStmt.cpp test/CodeGen/debug-label-inline.c test/CodeGen/debu

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai marked 2 inline comments as done. HsiangKai added a comment. Always add labels to DISubprogram even unreachable. Repository: rC Clang https://reviews.llvm.org/D45045 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.l

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai updated this revision to Diff 143243. HsiangKai added a comment. - Update test cases. - Checked with clang-format. Repository: rC Clang https://reviews.llvm.org/D45045 Files: lib/CodeGen/CGDebugInfo.cpp lib/CodeGen/CGDebugInfo.h lib/CodeGen/CGStmt.cpp test/CodeGen/backend-u

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai marked an inline comment as done. HsiangKai added a comment. @chenwj Do you have any comments for this patch? Repository: rC Clang https://reviews.llvm.org/D45045 ___ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm

[PATCH] D45045: [DebugInfo] Generate debug information for labels.

HsiangKai added a comment. In https://reviews.llvm.org/D45045#1114280, @HsiangKai wrote: > In https://reviews.llvm.org/D45045#1092697, @hans wrote: > > > This broke the Chromium build. I've uploaded a reproducer at > > https://bugs.chromium.org/p/chromium/issues/detail?id=841170#c1 > > > > I'm g

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai added a comment. Is this patch ready to land? Are there any comments or suggestions I missed? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69987/new/ https://reviews.llvm.org/D69987 ___ cfe-

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai added a comment. In D69987#1853986 , @HsiangKai wrote: > Update to version 0.8-draft-20191213. Hi Roger, I have updated it to 0.8-draft-20191213 in February. It is the same as version 0.8. Sorry for that I did not update the commit message. T

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai marked an inline comment as done. HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:2283 + unsigned Src2Reg = Inst.getOperand(1).getReg(); + if (DestReg == Src2Reg) +return Error(Loc, "The destination vecto

[PATCH] D80802: [RISCV] Upgrade RVV MC to v0.9.

HsiangKai updated this revision to Diff 267239. Herald added a project: clang. Herald added a subscriber: cfe-commits. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80802/new/ https://reviews.llvm.org/D80802 Files: clang/lib/Driver/ToolChains/Arch

[PATCH] D80802: [RISCV] Upgrade RVV MC to v0.9.

HsiangKai updated this revision to Diff 267447. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80802/new/ https://reviews.llvm.org/D80802 Files: clang/lib/Driver/ToolChains/Arch/RISCV.cpp clang/test/Driver/riscv-arch.c llvm/lib/Target/RISCV/Asm

[PATCH] D80802: [RISCV] Upgrade RVV MC to v0.9.

HsiangKai marked an inline comment as done. HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:99 // load vd, (rs1), vm class VUnitStrideLoad fpallares wrote: > I believe that with the changes introduced in the encoding of the

[PATCH] D80802: [RISCV] Upgrade RVV MC to v0.9.

HsiangKai added a comment. In D80802#2155432 , @simoncook wrote: > Since this patch replaces 0.8 support with 0.9, it should include an update > to the version check in `clang/lib/Driver/ToolChains/Arch/RISCV.cpp` to match. The modification is put in D8

[PATCH] D80802: [RISCV] Upgrade RVV MC to v0.9.

HsiangKai added a comment. In D80802#2155802 , @fpallares wrote: > Apologies we didn't identify this earlier but with the change of the mask > register layout (`MLEN=1`) the overlap constraints involving the mask > register were modified: > > //**RVV-0.8

[PATCH] D80802: [RISCV] Upgrade RVV MC to v0.9.

HsiangKai added a comment. Thanks for your review, @fpallares. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80802/new/ https://reviews.llvm.org/D80802 ___ cfe-commits mailing list cfe-commits@lists.llvm

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D69987/new/ https://reviews.llvm.org/D69987 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai added a comment. In D69987#2074265 , @MaskRay wrote: > Drive-by comment: the clang side change isn't tightly coupled with the LLVM > side changes. It should be a separate patch. Create https://reviews.llvm.org/D81188 for clang side change. R

[PATCH] D81188: [RISCV] Support experimental v extensions.

HsiangKai created this revision. HsiangKai added reviewers: MaskRay, rogfer01. Herald added subscribers: cfe-commits, evandro, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai marked an inline comment as done. HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrFormats.td:56 +def NoConstraint : RISCVVConstraint<0>; +def WidenV : RISCVVConstraint<1>; +def WidenW : RISCVVConstraint<2>; evand

[PATCH] D81188: [RISCV] Support experimental v extensions.

HsiangKai updated this revision to Diff 268642. HsiangKai added a comment. Address @MaskRay's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81188/new/ https://reviews.llvm.org/D81188 Files: clang/lib/Driver/ToolChains/Arch/RISCV.cpp

[PATCH] D81213: [RISCV] Support experimental v extension v0.9.

HsiangKai created this revision. HsiangKai added reviewers: evandro, rogfer01, rkruppe. Herald added subscribers: cfe-commits, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, MaskRay, jrtc27

[PATCH] D80802: [RISCV] Upgrade RVV MC to v0.9.

HsiangKai marked an inline comment as done. HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:2386 +CheckReg = Inst.getOperand(3).getReg(); } +if (DestReg == CheckReg) fpallares wrote: > fpallares wro

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai marked an inline comment as done. HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrFormats.td:56 +def NoConstraint : RISCVVConstraint<0>; +def WidenV : RISCVVConstraint<1>; +def WidenW : RISCVVConstraint<2>; evand

[PATCH] D69987: [RISCV] Assemble/Disassemble v-ext instructions.

HsiangKai marked an inline comment as done. HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:9 +/// +/// This file describes the RISC-V instructions from the standard 'V', +/// Vector instruction set extension. asb wrote: > Pl

[PATCH] D81188: [RISCV] Support experimental v extensions.

This revision was automatically updated to reflect the committed changes. Closed by commit rGd698ff92a59c: [RISCV] Support experimental v extensions. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81188/new/ https://reviews.l

[PATCH] D81213: [RISCV] Support experimental v extension v0.9.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG721d93fc5aa8: Support experimental v extension v0.9. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION htt

[PATCH] D106044: [RISCV] Update to vcpop.m, vlm.v and vsm.v according to v1.0-rc1.

HsiangKai added a comment. In D106044#2879361 , @rogfer01 wrote: > I'm confused because the PDF at > https://github.com/riscv/riscv-v-spec/releases/tag/v1.0-rc1 doesn't seem to > describe `vcpop.m`. > > I can see this has changed in the ToT > https:/

[PATCH] D106049: [RISCV] Update to vfredusum.vs and vfwredusum.vs according to v1.0-rc1.

HsiangKai abandoned this revision. HsiangKai added a comment. In D106049#2879422 , @frasercrmck wrote: > Duplicate of D105690 ? I didn't aware of it. Thanks. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST A

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:926 +def : InstAlias<"vfredsum.vs $vd, $vs2, $vs1$vm", +(VFREDUSUM_VS VR:$vd, VR:$vs2, VR:$vs1, VMaskOp:$vm)>; + How about to set the `Emit` to 0 to lower the pr

[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

HsiangKai updated this revision to Diff 359178. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105001/new/ https://reviews.llvm.org/D105001 Files: clang/include/clang/Basic/Builtins.def clang/i

[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

HsiangKai updated this revision to Diff 359667. HsiangKai added a comment. Add else and llvm_unreachable() for unhandled floating types. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105001/new/ https://reviews.llvm.org/D105001 Files: clang/incl

[PATCH] D103796: [Clang][RISCV] Implement vlsseg.

HsiangKai updated this revision to Diff 359703. HsiangKai added a comment. Correct the alignment of store. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103796/new/ https://reviews.llvm.org/D103796 Files: clang/include/clang/Basic/riscv_vector.t

[PATCH] D106255: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, frasercrmck, rogfer01. Herald added subscribers: StephenFan, vkmr, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzhe

[PATCH] D106255: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff.

HsiangKai updated this revision to Diff 359718. HsiangKai added a comment. Update vlsegff test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106255/new/ https://reviews.llvm.org/D106255 Files: clang/include/clang/Basic/riscv_vector.td c

[PATCH] D105001: [Clang][RISCV] Support half-precision floating point for RVV intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG77bb82d06856: [Clang][RISCV] Support half-precision floating point for RVV intrinsics. (authored by HsiangKai). Changed prior to commit: https://r

[PATCH] D106255: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG0d22dee2ca59: [Clang][RISCV] Correct the alignment of stores generated by vlseg/vlsegff. (authored by HsiangKai). Repository: rG LLVM Github Monor

[PATCH] D106340: [Clang][RISCV] Add half-precision FP for vle16/vse16.

HsiangKai created this revision. HsiangKai added a reviewer: craig.topper. Herald added subscribers: StephenFan, vkmr, frasercrmck, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzh

[PATCH] D103809: [Clang][RISCV] Implement vloxseg and vluxseg.

HsiangKai updated this revision to Diff 360013. HsiangKai added a comment. Correct alignment. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103809/new/ https://reviews.llvm.org/D103809 Files: clang/include/clang/Basic/riscv_vector.td clang/tes

[PATCH] D103796: [Clang][RISCV] Implement vlsseg.

HsiangKai updated this revision to Diff 360024. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103796/new/ https://reviews.llvm.org/D103796 Files: clang/include/clang/Basic/riscv_vector.td clan

[PATCH] D103809: [Clang][RISCV] Implement vloxseg and vluxseg.

HsiangKai updated this revision to Diff 360026. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103809/new/ https://reviews.llvm.org/D103809 Files: clang/include/clang/Basic/riscv_vector.td clan

[PATCH] D103873: [Clang][RISCV] Implement vsoxseg and vsuxseg.

HsiangKai updated this revision to Diff 360042. HsiangKai added a comment. Remove RV32 test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D103873/new/ https://reviews.llvm.org/D103873 Files: clang/include/clang/Basic/riscv_vector.td clan

[PATCH] D106340: [Clang][RISCV] Add half-precision FP for vle16/vse16.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG89ce6449024d: [Clang][RISCV] Add half-precision FP for vle16/vse16. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LA

[PATCH] D103796: [Clang][RISCV] Implement vlsseg.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGa9de8f7a5391: [Clang][RISCV] Implement vlsseg. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://r

[PATCH] D103809: [Clang][RISCV] Implement vloxseg and vluxseg.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG1c55033ea16f: [Clang][RISCV] Implement vloxseg and vluxseg. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTIO

[PATCH] D103873: [Clang][RISCV] Implement vsoxseg and vsuxseg.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG698f288fa16c: [Clang][RISCV] Implement vsoxseg and vsuxseg. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTIO

[PATCH] D105690: [RISCV] Rename assembler mnemonic of unordered floating-point reductions for v1.0-rc change

HsiangKai added inline comments. Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:10 /// This file describes the RISC-V instructions from the standard 'V' Vector /// extension, version 0.10. /// This version is still experimental as the 'V' extension hasn't been --

[PATCH] D106518: [RISCV] Disable EEW=64 for index values when XLEN=32.

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:680 foreach type = TypeList in { -foreach eew_list = EEWList in { +foreach eew_list = Xlen32EEWList in { defvar eew = eew_list[0]; There is no

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai created this revision. HsiangKai added reviewers: frasercrmck, khchen, arcbbb, rogfer01, evandro, craig.topper. Herald added subscribers: StephenFan, vkmr, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones,

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai updated this revision to Diff 362617. HsiangKai added a comment. Address comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106939/new/ https://reviews.llvm.org/D106939 Files: clang/test/CodeGen/RISCV/rvv-intrinsics/maskedoff-unde

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai updated this revision to Diff 362920. HsiangKai added a comment. - Add more comments. - Remove unnecessary `--riscv-no-aliases` in the test case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106939/new/ https://reviews.llvm.org/D106939

[PATCH] D106939: [RISCV] If the maskedoff is vundefined(), use ta, ma for vsetvli.

HsiangKai added a comment. In D106939#2912807 , @frasercrmck wrote: > LGTM but there are test failures. Is that just a whole load of `mu->ma` > changes that have been omitted for a smaller diff? Updated test cases are put in https://reviews.llvm.org/D1

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/RISCVVTypes.def:67 +RVV_VECTOR_TYPE_INT("__rvv_int8m2_t", RvvInt8m2, RvvInt8m2Ty, 16, 8, 1, true) +RVV_VECTOR_TYPE_INT("__rvv_int8m4_t", RvvInt8m4, RvvInt8m4Ty, 32, 8, 1, true) +RVV_VECTOR_TYPE_INT("

[PATCH] D93446: [RISCV] Add vadd with mask and without mask builtin.

HsiangKai added inline comments. Comment at: clang/lib/Basic/Targets/RISCV.cpp:194 HasV = true; -else if (Feature == "+experimental-zfh") + HasRISCVVTypes = true; +} else if (Feature == "+experimental-zfh") khchen wrote: > HasRISCVVTypes is an

[PATCH] D91315: [RISCV] Handle zfh in the arch string.

HsiangKai created this revision. HsiangKai added reviewers: craig.scott, asb, kito-cheng, luismarques, Jim. Herald added subscribers: cfe-commits, frasercrmck, NickHung, evandro, apazos, sameer.abuasal, pzheng, s.egerton, lenary, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rog

[PATCH] D91315: [RISCV] Handle zfh in the arch string.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG432d05174ed0: [RISCV] Handle zfh in the arch string. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION htt

[PATCH] D92650: [RISCV] Define preprocessor definitions for 'V' extension.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, asb, luismarques, evandro. Herald added subscribers: frasercrmck, NickHung, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzh

[PATCH] D92650: [RISCV] Define preprocessor definitions for 'V' extension.

This revision was automatically updated to reflect the committed changes. Closed by commit rG5e953a274b2a: [RISCV] Define preprocessor definitions for 'V' extension. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92650/new/ h

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/RISCVVTypes.def:32 +// - ElBits is the size of one element in bits (SEW). +// +// - IsSigned is true for vectors of signed integer elements and craig.topper wrote: > NF argument isn't document

[PATCH] D102822: [Clang][CodeGen] Set the size of llvm.lifetime to unknown for scalable types.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, frasercrmck, rogfer01. Herald added subscribers: StephenFan, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, j

[PATCH] D102822: [Clang][CodeGen] Set the size of llvm.lifetime to unknown for scalable types.

HsiangKai added a comment. In D102822#2770175 , @craig.topper wrote: > Am I mistaken, or does this test already pass without these changes? You are right. I didn't confirm it. I need to update the test case. Thanks. Repository: rG LLVM Github Monore

[PATCH] D102822: [Clang][CodeGen] Set the size of llvm.lifetime to unknown for scalable types.

HsiangKai updated this revision to Diff 346656. HsiangKai added a comment. Update the test case. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D102822/new/ https://reviews.llvm.org/D102822 Files: clang/lib/CodeGen/CGCall.cpp clang/lib/CodeGen/C

[PATCH] D103527: [Clang][RISCV] Implement vlseg and vlsegff.

HsiangKai created this revision. HsiangKai added reviewers: frasercrmck, craig.topper, rogfer01. Herald added subscribers: StephenFan, vkmr, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzhe

[PATCH] D102822: [Clang][CodeGen] Set the size of llvm.lifetime to unknown for scalable types.

HsiangKai added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D102822/new/ https://reviews.llvm.org/D102822 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/

[PATCH] D94583: [RISCV] Update V extension to v1.0-draft 08a0b464.

HsiangKai added a comment. In D94583#2513070 , @jrtc27 wrote: > There are a lot of "Resolve for v1.0" issues open against the spec still. Are > we sure we want to brand this as 1.0? It will end up as such in the ELF > attributes and thus be deemed compat

[PATCH] D93446: [RISCV] Add vadd with mask and without mask builtin.

HsiangKai added a comment. D95016 focuses on the Clang RVV builtin generator and it depends on this commit. I know it is clumsy to list the combinations for vadd plainly, but it is a simple way to demonstrate how to add RVV builtins in Clang. Could we accept th

[PATCH] D94583: [RISCV] Update V extension to v1.0-draft 08a0b464.

HsiangKai added a comment. In D94583#2514434 , @jrtc27 wrote: > In D94583#2513915 , @HsiangKai wrote: > >> In D94583#2513070 , @jrtc27 wrote: >> >>> There are a lot of "Resol

[PATCH] D94583: [RISCV] Update V extension to v1.0-draft 08a0b464.

HsiangKai updated this revision to Diff 318929. HsiangKai added a comment. Herald added subscribers: jdoerfert, hiraditya. Herald added a project: LLVM. Rebase. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94583/new/ https://reviews.llvm.org/D9458

[PATCH] D95016: [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics.

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:128 + // after an underscore (_). It is instantiated like Prototype. + string MangledSuffix = managed_suffix; + mangled_suffix Comment at: clang/include/cl

[PATCH] D94583: [RISCV] Update V extension to v1.0-draft 08a0b464.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rGf19849a07b67: [RISCV] Update V extension to v1.0-draft 08a0b464. (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

HsiangKai updated this revision to Diff 319144. HsiangKai added a comment. Address @craig.topper's comments. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92715/new/ https://reviews.llvm.org/D92715 Files: clang/include/clang/AST/ASTContext.h c

[PATCH] D95680: [RISCV] Update the version number to v0.10 for vector.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, jrtc27, rogfer01, frasercrmck, evandro. Herald added subscribers: vkmr, NickHung, jdoerfert, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edwar

[PATCH] D95680: [RISCV] Update the version number to v0.10 for vector.

HsiangKai added a comment. In D95680#2530775 , @asb wrote: > LGTM modulo one additional request: please update the comment at the top of > RISCVInstrInfoV.td to say "0.10" rather than "0.9". Thanks for pointing it out. I will do it. Repository: rG LL

[PATCH] D95680: [RISCV] Update the version number to v0.10 for vector.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG282aca10aeb0: [RISCV] Update the version number to v0.10 for vector. (authored by HsiangKai). Changed prior to commit: https://reviews.llvm.org/D9

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

HsiangKai added a comment. Herald added subscribers: StephenFan, vkmr. In D92715#2520925 , @craig.topper wrote: > I wonder if these types should be prefixed with "__clang_" like AArch64 tuple > types? It seems only AArch64 tuple types have "__clang_" pr

[PATCH] D109322: [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/riscv_vector.td:2186 +}] in +def policy : RVVHeader; khchen wrote: > It seems like we can rewrite `vsetvli/vsetvl` and ` vsetvlmax` instructions > by using the `RVVHeader` mechanism? > We onl

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added a comment. Herald added a subscriber: achieveartificialintelligence. I will wait for https://reviews.llvm.org/D109322 be accepted. These two patches need to get in together. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D105092/new/

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

HsiangKai added inline comments. Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:162 // For unit stride load with mask // Input: (maskedoff, pointer, mask, vl) class RISCVUSLoadMask khchen wrote: > maybe we could have another NFC patch to update thos

[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG7d39a8a92122: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics. (authored by HsiangKai). Changed prior to commit: https://reviews

[PATCH] D109322: [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG7afa61e71877: [RISCV] (2/2) Add the tail policy argument to builtins/intrinsics. (authored by HsiangKai). Changed prior to commit: https://reviews

[PATCH] D110684: [RISCV] Define _m intrinsics as builtins, instead of macros.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, rogfer01, frasercrmck. Herald added subscribers: achieveartificialintelligence, StephenFan, vkmr, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, Ma

[PATCH] D110684: [RISCV] Define _m intrinsics as builtins, instead of macros.

HsiangKai updated this revision to Diff 376890. HsiangKai added a comment. Update test cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110684/new/ https://reviews.llvm.org/D110684 Files: clang/include/clang/Basic/IdentifierTable.h clang/i

[PATCH] D106044: [RISCV] Update to vlm.v and vsm.v according to v1.0-rc1.

HsiangKai added a comment. Herald added a subscriber: achieveartificialintelligence. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D106044/new/ https://reviews.llvm.org/D106044 ___ cfe-commits maili

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

HsiangKai added a comment. In D92715#2544233 , @craig.topper wrote: > In D92715#2544178 , @HsiangKai wrote: > >> In D92715#2520925 , @craig.topper >> wrote: >> >>> I wonder

[PATCH] D93446: [RISCV] Add vadd with mask and without mask builtin.

HsiangKai added inline comments. Comment at: clang/include/clang/Basic/DiagnosticSemaKinds.td:11127 +def err_riscvv_builtin_not_useable : Error< + "builtin requires 'V' extension support to be enabled">; } // end of sema component. Jim wrote: > Add blank line.

[PATCH] D92715: [Clang][RISCV] Define RISC-V V builtin types

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG766ee1096f0b: [Clang][RISCV] Define RISC-V V builtin types (authored by HsiangKai). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D97264: [RISCV] Define types for Zvlsseg.

HsiangKai created this revision. HsiangKai added reviewers: craig.topper, frasercrmck, rogfer01. Herald added subscribers: StephenFan, vkmr, dexonsmith, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzhe

[PATCH] D97264: [RISCV] Define types for Zvlsseg.

HsiangKai updated this revision to Diff 325957. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D97264/new/ https://reviews.llvm.org/D97264 Files: clang/include/clang/AST/ASTContext.h clang/include/clang/Basic/Builtins.def clang/include/clang/Bas

[PATCH] D97264: [RISCV] Define types for Zvlsseg.

HsiangKai marked 3 inline comments as done. HsiangKai added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:10672 + if (Ty->isRecordType() && !Ty->getAsRecordDecl()->field_empty() && + Ty->getAsRecordDecl()->field_begin()->getType()->isSizelessType()) --

[PATCH] D97264: [RISCV] Define types for Zvlsseg.

HsiangKai added inline comments. Comment at: clang/include/clang/AST/ASTContext.h:1024 +#define RVV_TUPLE(Name, ElemId, Id, SingletonId, NE, EB, NF, IsSigned, IsFP) \ + QualType SingletonId; #include "clang/Basic/RISCVVTypes.def" craig.topper wrote: > craig.top

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