RKSimon added a comment.
Yes using that uninitialized value has worried me as well. I originally set it
to zero (and considered using __ LINE __ or __ COUNTER __) but both introduce
defined behaviour that I could see causing all sorts of problems further down
the line in debug vs release
RKSimon abandoned this revision.
RKSimon added a comment.
In http://reviews.llvm.org/D12143#228006, @ab wrote:
Heh, this is http://reviews.llvm.org/D10556, no? :P
Yes you're right (and you remembered to kill the builtin defs) - please can you
add some more reviewers so that we can get it
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As discussed in PR23648 - the intrinsics _m_from_int, _m_to_int and _m_prefetch
are defined in mmintrin.h and
Author: rksimon
Date: Sun Aug 23 11:19:38 2015
New Revision: 245815
URL: http://llvm.org/viewvc/llvm-project?rev=245815view=rev
Log:
Added missing tests for SSE41 pmovsx/pmovzx extension intrinsics
Modified:
cfe/trunk/test/CodeGen/sse-builtins.c
Modified:
RKSimon updated this revision to Diff 32514.
RKSimon added a comment.
Added ia32 builtin undef intrinsics (I didn't bother with the mmx as I can't
find any evidence of an undefined intrinsic for it). Added the avx512
intrinsics referenced in the intel intrinsics guide.
Technically there's
RKSimon added a comment.
Definitely like this idea - hopefully it'll make it safer to remove unnecessary
builtins.
Comment at: avx2-builtins-codegen.c:182
@@ -151,1 +181,3 @@
+ // FIXME-CHECK-ASM: vpxor %ymm{{.*}}
+ // FIXME-CHECK-ASM: vandps {{.*}}, %ymm{{.*}}
return
RKSimon created this revision.
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Adds missing SSE/AVX 'undefined' intrinsics (PR24040):
_mm_undefined_pd + _mm256_undefined_pd
_mm_undefined_ps
Author: rksimon
Date: Sun Nov 15 08:40:31 2015
New Revision: 253169
URL: http://llvm.org/viewvc/llvm-project?rev=253169=rev
Log:
[X86][MMX] Added MMX IR + assembly codegen builtin tests for some missing cvt
intrinsics
Modified:
cfe/trunk/test/CodeGen/mmx-builtins.c
Modified:
Author: rksimon
Date: Sat Nov 14 07:25:06 2015
New Revision: 253131
URL: http://llvm.org/viewvc/llvm-project?rev=253131=rev
Log:
[X86][MMX] Sorted MMX IR + assembly codegen builtin tests
Makes it easier to track what tests are missing
Modified:
cfe/trunk/test/CodeGen/mmx-builtins.c
Author: rksimon
Date: Sat Nov 14 06:47:44 2015
New Revision: 253130
URL: http://llvm.org/viewvc/llvm-project?rev=253130=rev
Log:
[X86][MMX] Added MMX IR + assembly codegen builtin tests
Improved tests as discussed in PR24580
Modified:
cfe/trunk/test/CodeGen/mmx-builtins.c
Modified:
Author: rksimon
Date: Wed Aug 26 16:17:12 2015
New Revision: 246083
URL: http://llvm.org/viewvc/llvm-project?rev=246083view=rev
Log:
[X86][SSE] Add _mm_undefined_* intrinsics
Added missing SSE/AVX 'undefined' intrinsics (PR24040):
_mm_undefined_pd, _mm_undefined_ps + _mm_undefined_si128
Author: rksimon
Date: Thu Aug 27 15:34:02 2015
New Revision: 246204
URL: http://llvm.org/viewvc/llvm-project?rev=246204view=rev
Log:
[X86][F16C] Added debug codegen test for F16C intrinsics
Part of PR24590
Modified:
cfe/trunk/test/CodeGen/f16c-builtins.c
Modified:
Author: rksimon
Date: Thu Aug 27 16:32:03 2015
New Revision: 246211
URL: http://llvm.org/viewvc/llvm-project?rev=246211view=rev
Log:
[X86][XOP] Added debug codegen test for XOP intrinsics
Part of PR24590
Modified:
cfe/trunk/test/CodeGen/xop-builtins.c
Modified:
Author: rksimon
Date: Thu Aug 27 15:41:45 2015
New Revision: 246206
URL: http://llvm.org/viewvc/llvm-project?rev=246206view=rev
Log:
[X86][FMA4] Added debug codegen test for FMA4 intrinsics
Part of PR24590
Modified:
cfe/trunk/test/CodeGen/fma4-builtins.c
Modified:
Author: rksimon
Date: Thu Aug 27 17:18:09 2015
New Revision: 246223
URL: http://llvm.org/viewvc/llvm-project?rev=246223view=rev
Log:
[X86][3DNow] Added debug codegen test for 3DNow! intrinsics
Part of PR24590
Modified:
cfe/trunk/test/CodeGen/3dnow-builtins.c
Modified:
RKSimon created this revision.
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RKSimon set the repository for this revision to rL LLVM.
Follow up to D12272
This adds the missing 3dnow intrinsics _m_to_float / _m_from_float and removes
Author: rksimon
Date: Sun Sep 6 09:05:33 2015
New Revision: 246944
URL: http://llvm.org/viewvc/llvm-project?rev=246944=rev
Log:
[X86]][SSE42] Added SSE42 IR + assembly codegen builtin tests
Added:
cfe/trunk/test/CodeGen/sse42-builtins.c
Added: cfe/trunk/test/CodeGen/sse42-builtins.c
URL:
Author: rksimon
Date: Sun Sep 6 09:45:13 2015
New Revision: 246945
URL: http://llvm.org/viewvc/llvm-project?rev=246945=rev
Log:
[X86]][SSE3] Added SSE3 IR + assembly codegen builtin tests
Added:
cfe/trunk/test/CodeGen/sse3-builtins.c
Added: cfe/trunk/test/CodeGen/sse3-builtins.c
URL:
Author: rksimon
Date: Sun Sep 6 12:06:22 2015
New Revision: 246948
URL: http://llvm.org/viewvc/llvm-project?rev=246948=rev
Log:
[X86][SSSE3] Added SSSE3 IR + assembly codegen builtin tests
Transferred SSSE3 instructions from sse-builtins.c
Added:
cfe/trunk/test/CodeGen/ssse3-builtins.c
Author: rksimon
Date: Sun Sep 6 11:38:17 2015
New Revision: 246947
URL: http://llvm.org/viewvc/llvm-project?rev=246947=rev
Log:
[X86]][SSE3] Added SSE41 IR + assembly codegen builtin tests
Transferred SSE41 instructions from sse-builtins.c
Added:
cfe/trunk/test/CodeGen/sse41-builtins.c
Author: rksimon
Date: Tue Aug 25 16:27:46 2015
New Revision: 245975
URL: http://llvm.org/viewvc/llvm-project?rev=245975view=rev
Log:
[X86] Remove unnecessary MMX declarations from Intrin.h
As discussed in PR23648 - the intrinsics _m_from_int, _m_to_int and _m_prefetch
are defined in mmintrin.h
This revision was automatically updated to reflect the committed changes.
Closed by commit rL245975: [X86] Remove unnecessary MMX declarations from
Intrin.h (authored by RKSimon).
Changed prior to commit:
http://reviews.llvm.org/D12272?vs=32926id=33124#toc
Repository:
rL LLVM
Author: rksimon
Date: Mon Sep 7 15:10:11 2015
New Revision: 246974
URL: http://llvm.org/viewvc/llvm-project?rev=246974=rev
Log:
[X86][SSE4A] Added SSE4A IR + assembly codegen builtin tests
Modified:
cfe/trunk/test/CodeGen/sse4a-builtins.c
Modified: cfe/trunk/test/CodeGen/sse4a-builtins.c
RKSimon created this revision.
RKSimon added reviewers: ab, qcolombet, craig.topper, spatel.
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128-bit vector integer sign extensions correctly lower to the pmovsx
instructions even for debug builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rL248092: [X86][SSE] Replace 128-bit SSE41 PMOVSX intrinsics
with native IR (authored by RKSimon).
Changed prior to commit:
http://reviews.llvm.org/D12835?vs=34646=35167#toc
Repository:
rL LLVM
Author: rksimon
Date: Sat Sep 19 10:12:38 2015
New Revision: 248092
URL: http://llvm.org/viewvc/llvm-project?rev=248092=rev
Log:
[X86][SSE] Replace 128-bit SSE41 PMOVSX intrinsics with native IR
128-bit vector integer sign extensions correctly lower to the pmovsx
instructions even for debug
specific area and check the
AArch64 bots after commit to make sure it passes.
You probably didn't get the email because the bot was broken when you
committed, then all your other commits were breaking a broken bot. :)
cheers,
--renato
On 27 August 2015 at 23:18, Simon Pilgrim via cfe-commits
cfe
Nov 2015, at 20:38, Eric Christopher <echri...@gmail.com
>> <mailto:echri...@gmail.com>> wrote:
>>
>> This is amazing... And entirely the wrong place for the asm tests. :)
>>
>> Would you mind splitting this test case in two with an IR test for clang and
>
- if asm is not supposed to go in tests/CodeGen where is it
>> supposed to go?
>>
>>> On 29 Nov 2015, at 20:38, Eric Christopher <echri...@gmail.com
>>> <mailto:echri...@gmail.com>> wrote:
>>>
>>> This is amazing... And entirely the
Author: rksimon
Date: Sun Nov 29 14:23:00 2015
New Revision: 254262
URL: http://llvm.org/viewvc/llvm-project?rev=254262=rev
Log:
[X86][SSE2] Added SSE2 IR + assembly codegen builtin tests
Improved tests as discussed in PR24580
Added:
cfe/trunk/test/CodeGen/sse2-builtins.c
Added:
Author: rksimon
Date: Tue Dec 8 15:16:45 2015
New Revision: 255050
URL: http://llvm.org/viewvc/llvm-project?rev=255050=rev
Log:
[X86][AVX2] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86
as fast-isel tests using IR that is as close
Author: rksimon
Date: Sat Dec 5 05:12:23 2015
New Revision: 254849
URL: http://llvm.org/viewvc/llvm-project?rev=254849=rev
Log:
[X86][3DNow!] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86
as fast-isel tests using IR that is as
Author: rksimon
Date: Sat Dec 5 04:37:35 2015
New Revision: 254847
URL: http://llvm.org/viewvc/llvm-project?rev=254847=rev
Log:
[X86][F16C] Stripped backend codegen tests
As discussed on the ml, backend tests need to be put in llvm/test/CodeGen/X86
as fast-isel tests using IR that is as close
Author: rksimon
Date: Sat Dec 5 05:08:51 2015
New Revision: 254848
URL: http://llvm.org/viewvc/llvm-project?rev=254848=rev
Log:
Updated test names to match the intrinsics being tested
Modified:
cfe/trunk/test/CodeGen/sse3-builtins.c
cfe/trunk/test/CodeGen/sse4a-builtins.c
Modified:
RKSimon added a subscriber: RKSimon.
RKSimon closed this revision.
RKSimon added a comment.
Committed at http://reviews.llvm.org/rL253886
http://reviews.llvm.org/D14215
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RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
LGTM - add test_mm512_setzero_pd() as well if you can.
Comment at: test/CodeGen/avx512f-builtins.c:7291
@@ +7290,3 @@
+
+__m512i test_mm512_setzero_ps()
+{
RKSimon added a comment.
Is there any reason that we shouldn't include the avxintrin.h
__builtin_ia32_cmppd/__builtin_ia32_cmpps/__builtin_ia32_cmppd256/__builtin_ia32_cmpps256
packed intrinsics in this CGBuiltin.cpp patch? Since we're heading towards
nixing them anyhow.
RKSimon added a comment.
Eeep that's certainly a lot more work than just adding a few extra cases!
Please add a TODO explaining what we need to do?
If there is a problem with the header documentation please can you raise a
bugzilla and CC Katya Romanova.
http://reviews.llvm.org/D21268
RKSimon added a comment.
In http://reviews.llvm.org/D20358#446241, @RKSimon wrote:
> In http://reviews.llvm.org/D20358#446220, @ab wrote:
>
> > In http://reviews.llvm.org/D20358#446218, @ab wrote:
> >
> > > In http://reviews.llvm.org/D20358#446210, @RKSimon wrote:
> > >
> > > > Is there any
RKSimon created this revision.
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RKSimon set the repository for this revision to rL LLVM.
As discussed on D20358, we can now use __builtin_nontemporal_store instead of
target specific builtins for
Author: rksimon
Date: Wed May 25 10:10:49 2016
New Revision: 270708
URL: http://llvm.org/viewvc/llvm-project?rev=270708=rev
Log:
[X86][AVX2] Full set of AVX2 intrinsics tests
llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll will be synced to this
Modified:
Author: rksimon
Date: Sat May 28 03:12:45 2016
New Revision: 271106
URL: http://llvm.org/viewvc/llvm-project?rev=271106=rev
Log:
[X86][SSE] Replace VPMOVSX and (V)PMOVZX integer extension intrinsics with
generic IR (clang)
The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely
This revision was automatically updated to reflect the committed changes.
Closed by commit rL271106: [X86][SSE] Replace VPMOVSX and (V)PMOVZX integer
extension intrinsics with… (authored by RKSimon).
Changed prior to commit:
http://reviews.llvm.org/D20684?vs=58626=58884#toc
Repository:
rL
Author: rksimon
Date: Mon Jun 13 04:57:52 2016
New Revision: 272540
URL: http://llvm.org/viewvc/llvm-project?rev=272540=rev
Log:
[Clang][X86] Convert non-temporal store builtins to generic
__builtin_nontemporal_store in headers
We can now use __builtin_nontemporal_store instead of target
Author: rksimon
Date: Mon Jun 13 05:05:19 2016
New Revision: 272541
URL: http://llvm.org/viewvc/llvm-project?rev=272541=rev
Log:
Fix unused variable warning
Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL:
RKSimon added a subscriber: RKSimon.
RKSimon added a reviewer: RKSimon.
Comment at: lib/Headers/bmiintrin.h:296
@@ -290,1 +295,3 @@
+}
+
#ifdef __x86_64__
Why not just #define to __tzcnt_u32 like the (many) other duplicate tzcnt
intrinsics we have:
```
#define
RKSimon added a comment.
It seems like part of the need for this is because the _mm_cmp_ps style
intrinsics are defined as macros (to get around the problem of trying to use an
immediate as an argument):
#define _mm_cmp_ps(a, b, c) __extension__ ({ \
RKSimon added a comment.
http://reviews.llvm.org/D21272 has now been committed, which I think removes
the need for this patch. http://reviews.llvm.org/D20359 is still needed (with
the additional tests requested by Craig).
http://reviews.llvm.org/D20358
RKSimon added a subscriber: RKSimon.
RKSimon added a comment.
Should AVX512 store support (non-temporal or otherwise) be added to
X86FastISel::X86FastEmitStore ?
http://reviews.llvm.org/D20359
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Author: rksimon
Date: Sun May 29 13:49:08 2016
New Revision: 271187
URL: http://llvm.org/viewvc/llvm-project?rev=271187=rev
Log:
[X86][SSE] Make unsigned integer vector types generally available
As discussed on http://reviews.llvm.org/D20684, move the unsigned integer
vector types used for zero
RKSimon created this revision.
RKSimon added reviewers: mkuper, craig.topper, spatel, andreadb.
RKSimon added a subscriber: cfe-commits.
RKSimon set the repository for this revision to rL LLVM.
The VPMOVSX and (V)PMOVZX sign/zero extension intrinsics can be safely
represented as generic
RKSimon added inline comments.
Comment at: lib/Headers/emmintrin.h:598
@@ -594,3 +597,3 @@
static __inline__ void __DEFAULT_FN_ATTRS
-_mm_store_pd(double *__dp, __m128d __a)
+_mm_store_pd1(double *__dp, __m128d __a)
{
majnemer wrote:
> You could use
RKSimon added a comment.
In http://reviews.llvm.org/D20684#442514, @ab wrote:
> I'd add the unsigned typedefs with their signed counterparts; no reason not
> to.
> With that, LGTM.
Thanks, I'll do that as a follow up commit.
Repository:
rL LLVM
http://reviews.llvm.org/D20684
RKSimon added a comment.
Can you add tests for the existing _mm512_setzero_* intrinsics as well please?
http://reviews.llvm.org/D20871
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Author: rksimon
Date: Thu May 26 04:56:50 2016
New Revision: 270833
URL: http://llvm.org/viewvc/llvm-project?rev=270833=rev
Log:
[X86][AVX2] Improved checks for float/double mask generation for non-masked
gathers
Modified:
cfe/trunk/test/CodeGen/avx2-builtins.c
Modified:
Author: rksimon
Date: Thu May 26 05:20:25 2016
New Revision: 270836
URL: http://llvm.org/viewvc/llvm-project?rev=270836=rev
Log:
[X86][F16C] Improved f16c intrinsics checks
Added checks for upper elements being zero'd in scalar conversions
Modified:
cfe/trunk/test/CodeGen/f16c-builtins.c
RKSimon added a comment.
In http://reviews.llvm.org/D20358#446220, @ab wrote:
> In http://reviews.llvm.org/D20358#446218, @ab wrote:
>
> > In http://reviews.llvm.org/D20358#446210, @RKSimon wrote:
> >
> > > Is there any reason why we can't just get rid of all the SSE movnt
> > > builtins and
RKSimon added a subscriber: RKSimon.
RKSimon added a comment.
Is there any reason why we can't just get rid of all the SSE movnt builtins and
use __builtin_nontemporal_store instead (http://reviews.llvm.org/D12313)?
http://reviews.llvm.org/D20358
This revision was automatically updated to reflect the committed changes.
Closed by commit rL271436: [X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ
truncating (round to zero)… (authored by RKSimon).
Changed prior to commit:
http://reviews.llvm.org/D20859?vs=59204=59284#toc
Repository:
rL
RKSimon added a subscriber: RKSimon.
RKSimon added a comment.
Tests?
http://reviews.llvm.org/D20871
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Author: rksimon
Date: Wed Jun 1 16:46:51 2016
New Revision: 271436
URL: http://llvm.org/viewvc/llvm-project?rev=271436=rev
Log:
[X86][SSE] Replace (V)CVTTPS2DQ and VCVTTPD2DQ truncating (round to zero)
f32/f64 to i32 with generic IR (clang)
The 'cvtt' truncation (round to zero) conversions can
RKSimon created this revision.
RKSimon added reviewers: ab, mkuper, craig.topper, spatel, andreadb.
RKSimon added a subscriber: cfe-commits.
RKSimon set the repository for this revision to rL LLVM.
The 'cvtt' truncation (round to zero) conversions can be safely represented as
generic
Author: rksimon
Date: Mon May 30 12:55:25 2016
New Revision: 271218
URL: http://llvm.org/viewvc/llvm-project?rev=271218=rev
Log:
[X86][SSE] _mm_store1_ps/_mm_store1_pd should require an aligned pointer
According to the gcc headers, intel intrinsics docs and msdn codegen the
_mm_store1_pd (and
This revision was automatically updated to reflect the committed changes.
Closed by commit rL271218: [X86][SSE] _mm_store1_ps/_mm_store1_pd should
require an aligned pointer (authored by RKSimon).
Changed prior to commit:
http://reviews.llvm.org/D20617?vs=58397=58979#toc
Repository:
rL LLVM
Author: rksimon
Date: Mon May 30 12:58:38 2016
New Revision: 271219
URL: http://llvm.org/viewvc/llvm-project?rev=271219=rev
Log:
[X86][SSE] Added missing tests (merge failure)
Differential Revision: http://reviews.llvm.org/D20617
Modified:
cfe/trunk/test/CodeGen/sse-builtins.c
Modified:
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
LGTM
Comment at: lib/Headers/bmiintrin.h:284
@@ -283,2 +283,3 @@
///bits in the operand.
+
static __inline__ unsigned int __RELAXED_FN_ATTRS
Why the
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
LGTM - the compile warning is clear and it could be a problem if we allow
undefined values through on pre-AVX targets.
The only other thing we could do is handle these in CGBuiltin and
RKSimon added a subscriber: RKSimon.
Comment at: tools/clang/test/CodeGen/sse2-builtins.c:1527
@@ +1526,3 @@
+ // CHECK: load i64, i64* %__u
+ // CHECK: insertelement <2 x i64> undef, i64 %4, i32 0
+ // CHECK: insertelement <2 x i64> %{{.*}}, i64 0, i32 1
RKSimon added inline comments.
Comment at: tools/clang/test/CodeGen/sse2-builtins.c:1526
@@ +1525,3 @@
+ // CHECK-LABEL: test_mm_loadu_si64
+ // CHECK: load i64, i64* %__u
+ // CHECK: insertelement <2 x i64> undef, i64 %{{.*}}, i32 0
Please can add the
Author: rksimon
Date: Sat Jun 18 12:09:40 2016
New Revision: 273086
URL: http://llvm.org/viewvc/llvm-project?rev=273086=rev
Log:
[X86][TBM] Refreshed builtin tests ready for creation of llvm fast-isel tests
Modified:
cfe/trunk/test/CodeGen/tbm-builtins.c
Modified:
Author: rksimon
Date: Sat Jun 18 13:20:14 2016
New Revision: 273090
URL: http://llvm.org/viewvc/llvm-project?rev=273090=rev
Log:
[X86][XOP] Refreshed builtin tests ready for creation of llvm fast-isel tests
Modified:
cfe/trunk/test/CodeGen/xop-builtins.c
Modified:
Author: rksimon
Date: Fri Jun 17 09:28:16 2016
New Revision: 273003
URL: http://llvm.org/viewvc/llvm-project?rev=273003=rev
Log:
[X86][SSE4A] Use native IR for mask movntsd/movntss intrinsics.
Depends on llvm side commit r273002.
Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel, andreadb.
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RKSimon set the repository for this revision to rL LLVM.
btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't support
XSAVE.
This looks like some kind
RKSimon updated this revision to Diff 49552.
RKSimon added a comment.
Thanks - I've removed adding XSAVE to btver2, as long as nobody thinks we need
to keep it to be explicit?
Repository:
rL LLVM
http://reviews.llvm.org/D17682
Files:
lib/Basic/Targets.cpp
Author: rksimon
Date: Tue Mar 1 16:38:33 2016
New Revision: 262418
URL: http://llvm.org/viewvc/llvm-project?rev=262418=rev
Log:
Updated SSE41 builtin tests to more closely match the llvm fast-isel equivalent
tests
Modified:
cfe/trunk/test/CodeGen/sse41-builtins.c
Modified:
Author: rksimon
Date: Thu Mar 10 08:16:36 2016
New Revision: 263113
URL: http://llvm.org/viewvc/llvm-project?rev=263113=rev
Log:
Minor Wdocumentation fix. NFCI.
Modified:
cfe/trunk/include/clang/ASTMatchers/ASTMatchers.h
Modified: cfe/trunk/include/clang/ASTMatchers/ASTMatchers.h
URL:
Author: rksimon
Date: Thu Mar 10 08:42:17 2016
New Revision: 263115
URL: http://llvm.org/viewvc/llvm-project?rev=263115=rev
Log:
Updated SSSE3 builtin tests to more closely match the llvm fast-isel equivalent
tests
Modified:
cfe/trunk/test/CodeGen/ssse3-builtins.c
Modified:
Author: rksimon
Date: Thu Mar 10 08:46:49 2016
New Revision: 263117
URL: http://llvm.org/viewvc/llvm-project?rev=263117=rev
Log:
Updated SSE3 builtin tests to more closely match the llvm fast-isel equivalent
tests
Modified:
cfe/trunk/test/CodeGen/sse3-builtins.c
Modified:
Author: rksimon
Date: Thu Mar 10 08:44:32 2016
New Revision: 263116
URL: http://llvm.org/viewvc/llvm-project?rev=263116=rev
Log:
Added note to SSE4a builtins about keeping in sync with llvm tests
Modified:
cfe/trunk/test/CodeGen/sse4a-builtins.c
Modified:
Author: rksimon
Date: Thu Apr 7 12:38:24 2016
New Revision: 265700
URL: http://llvm.org/viewvc/llvm-project?rev=265700=rev
Log:
Minor Wdocumentation fix. NFCI.
Modified:
cfe/trunk/include/clang/Parse/Parser.h
Modified: cfe/trunk/include/clang/Parse/Parser.h
URL:
Author: rksimon
Date: Sun Mar 20 11:25:23 2016
New Revision: 263908
URL: http://llvm.org/viewvc/llvm-project?rev=263908=rev
Log:
Fixed -Wdocumentation warning
Modified:
cfe/trunk/include/clang/Frontend/FrontendAction.h
Modified: cfe/trunk/include/clang/Frontend/FrontendAction.h
URL:
Author: rksimon
Date: Sat Mar 5 16:35:55 2016
New Revision: 262783
URL: http://llvm.org/viewvc/llvm-project?rev=262783=rev
Log:
Fixed -Wdocumentation warning - typo in a parameter name
Modified:
cfe/trunk/lib/CodeGen/CGOpenMPRuntime.h
Modified: cfe/trunk/lib/CodeGen/CGOpenMPRuntime.h
URL:
Author: rksimon
Date: Sat Mar 5 08:35:44 2016
New Revision: 262772
URL: http://llvm.org/viewvc/llvm-project?rev=262772=rev
Log:
[X86] AMD Bobcat CPU (btver1) doesn't support XSAVE
btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't support
XSAVE.
Differential Revision:
This revision was automatically updated to reflect the committed changes.
Closed by commit rL262772: [X86] AMD Bobcat CPU (btver1) doesn't support XSAVE
(authored by RKSimon).
Changed prior to commit:
http://reviews.llvm.org/D17682?vs=49552=49877#toc
Repository:
rL LLVM
Author: rksimon
Date: Wed Apr 27 15:43:32 2016
New Revision: 267786
URL: http://llvm.org/viewvc/llvm-project?rev=267786=rev
Log:
Wdocumentation fix
Modified:
clang-tools-extra/trunk/include-fixer/tool/ClangIncludeFixer.cpp
Modified:
RKSimon created this revision.
RKSimon added reviewers: mkuper, craig.topper, kromanova, spatel.
RKSimon added a subscriber: cfe-commits.
RKSimon set the repository for this revision to rL LLVM.
Ensure _mm256_extract_epi8 and _mm256_extract_epi16 zero extend their i8/i16
result to i32. This
Author: rksimon
Date: Fri May 20 07:57:21 2016
New Revision: 270212
URL: http://llvm.org/viewvc/llvm-project?rev=270212=rev
Log:
[X86][AVX] Added _mm256_extract_epi64 test
Modified:
cfe/trunk/test/CodeGen/avx-builtins.c
Modified: cfe/trunk/test/CodeGen/avx-builtins.c
URL:
RKSimon added a comment.
In http://reviews.llvm.org/D20468#435522, @mkuper wrote:
> Could you point me to where in the documentation it says they must be
> zero-extended?
> The Intel intrinsics guide actually has them with shorter return types:
>
> __int8 _mm256_extract_epi8 (__m256i a,
RKSimon created this revision.
RKSimon added reviewers: qcolombet, craig.topper, mkuper, andreadb, spatel.
RKSimon added a subscriber: cfe-commits.
RKSimon set the repository for this revision to rL LLVM.
Both the (V)CVTDQ2PD(Y) (i32 to f64) and (V)CVTPS2PD(Y) (f32 to f64) conversion
RKSimon updated this revision to Diff 58146.
Repository:
rL LLVM
http://reviews.llvm.org/D20528
Files:
include/clang/Basic/BuiltinsX86.def
lib/Headers/avxintrin.h
lib/Headers/emmintrin.h
test/CodeGen/avx-builtins.c
test/CodeGen/builtins-x86.c
test/CodeGen/sse2-builtins.c
RKSimon added a comment.
In http://reviews.llvm.org/D20528#436893, @mkuper wrote:
> This looks right, but we may lose some end-to-end tests, since right now we
> have a clang-level test that checks the builtin is lowered to the intrinsic,
> and (hopefully) a CG-level test that the intrinsic is
RKSimon added a comment.
In http://reviews.llvm.org/D20528#437117, @mkuper wrote:
> Sorry, I didn't intend to imply the rest of the llvm work is necessary for
> this to go in. Just that I'd be happier with this patch knowing that we have
> a regression test for doing the (shuffle + fpext, say)
RKSimon added a comment.
In http://reviews.llvm.org/D20528#437165, @mkuper wrote:
> Presumably, the fast-isel lowering of the IR pattern is already correct, and
> in any case, it isn't affected by this patch.
> I just want to make sure we don't regress the optimized DAG codegen - that
> is,
This revision was automatically updated to reflect the committed changes.
Closed by commit rL270499: [X86][SSE] Replace lossless i32/f32 to f64
conversion intrinsics with generic IR (authored by RKSimon).
Changed prior to commit:
http://reviews.llvm.org/D20528?vs=58146=58160#toc
Repository:
Author: rksimon
Date: Mon May 23 17:13:02 2016
New Revision: 270499
URL: http://llvm.org/viewvc/llvm-project?rev=270499=rev
Log:
[X86][SSE] Replace lossless i32/f32 to f64 conversion intrinsics with generic IR
Both the (V)CVTDQ2PD(Y) (i32 to f64) and (V)CVTPS2PD(Y) (f32 to f64) conversion
Author: rksimon
Date: Thu May 19 04:52:59 2016
New Revision: 270034
URL: http://llvm.org/viewvc/llvm-project?rev=270034=rev
Log:
[X86][SSE2] Sync with llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
Modified:
cfe/trunk/test/CodeGen/sse2-builtins.c
Modified:
Author: rksimon
Date: Thu May 19 06:03:48 2016
New Revision: 270042
URL: http://llvm.org/viewvc/llvm-project?rev=270042=rev
Log:
[X86][SSE2] Added _mm_cast* and _mm_set* tests
Modified:
cfe/trunk/test/CodeGen/sse2-builtins.c
Modified: cfe/trunk/test/CodeGen/sse2-builtins.c
URL:
Author: rksimon
Date: Thu May 19 06:18:49 2016
New Revision: 270043
URL: http://llvm.org/viewvc/llvm-project?rev=270043=rev
Log:
[X86][SSE2] Added _mm_move_* tests
Modified:
cfe/trunk/test/CodeGen/sse2-builtins.c
Modified: cfe/trunk/test/CodeGen/sse2-builtins.c
URL:
Author: rksimon
Date: Thu May 19 11:48:59 2016
New Revision: 270079
URL: http://llvm.org/viewvc/llvm-project?rev=270079=rev
Log:
[X86][SSE2] Fixed shuffle of results in _mm_cmpnge_sd/_mm_cmpngt_sd tests
Modified:
cfe/trunk/test/CodeGen/sse2-builtins.c
Modified:
Author: rksimon
Date: Sat May 21 16:14:35 2016
New Revision: 270330
URL: http://llvm.org/viewvc/llvm-project?rev=270330=rev
Log:
[X86][AVX] Ensure zero-extension of _mm256_extract_epi8 and _mm256_extract_epi16
Ensure _mm256_extract_epi8 and _mm256_extract_epi16 zero extend their i8/i16
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