[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

2016-12-06 Thread ZiXuan Wu via Phabricator via cfe-commits
Zeson marked 2 inline comments as done. Zeson added a comment. Hi, All. The revision has been updated, please review it again. Thanks a lot. https://reviews.llvm.org/D27251 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

2016-12-01 Thread ZiXuan Wu via Phabricator via cfe-commits
Zeson added a comment. In https://reviews.llvm.org/D27251#610629, @kbarton wrote: > Please make explicit the signed for the parameters to the functions you are > changing and remove unnecessary casts. I marked the first few that I found, > but stopped marking them after the first several. I

[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

2016-12-01 Thread ZiXuan Wu via Phabricator via cfe-commits
Zeson updated this revision to Diff 80021. Zeson marked 3 inline comments as done. Zeson added a comment. Remove some unnecessary cast https://reviews.llvm.org/D27251 Files: lib/Headers/altivec.h test/CodeGen/builtins-ppc-altivec.c test/CodeGen/builtins-ppc-p8vector.c

[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

2016-11-30 Thread ZiXuan Wu via Phabricator via cfe-commits
Zeson updated this revision to Diff 79856. Zeson added a comment. Make vec_xst_be and vec_xl_be test cases put together seperately in `builtins-ppc-vsx.c` Move up macro `__VSX__` to make all vec_xst_be functions included https://reviews.llvm.org/D27251 Files: lib/Headers/altivec.h

[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

2016-11-30 Thread ZiXuan Wu via Phabricator via cfe-commits
Zeson added a comment. In https://reviews.llvm.org/D27251#609014, @nemanjai wrote: > Thank you for fixing these issues. I certainly see how the shifts really need > to get the signedness right because the right shifts need to fill with the > sign bit (so that vector bool will still have all 0

[PATCH] D27251: [PPC] some bugs mainly about sign problem fixed in altivec.h

2017-04-19 Thread ZiXuan Wu via Phabricator via cfe-commits
Zeson abandoned this revision. Zeson added a comment. I think this revision is out-of-date. I'd like to abandon it. https://reviews.llvm.org/D27251 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D53417: [Clang][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambious call error

2018-10-19 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added a comment. If anybody knows who are familiar with C/C++ function overload and code related to this issue, please feel free to add them as reviewers and subscribers. Repository: rC Clang https://reviews.llvm.org/D53417 ___

[PATCH] D53417: [Clang][PowerPC] Choose a better candidate as function call if there is a compatible vector conversion instead of ambious call error

2018-10-19 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish created this revision. wuzish added reviewers: hfinkel, nemanjai, Douglasgido, hubert.reinterpretcast, fpichet. There are 2 function variations with altivec type parameter. When we call them with argument of generic gcc vector type we would prefer to choose the variation with implicit

[PATCH] D53417: [Clang][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-10-19 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. Comment at: clang/test/Sema/altivec-generic-overload.c:3 + +typedef signed char __v4sc __attribute__((__vector_size__(16))); +typedef unsigned char __v4uc __attribute__((__vector_size__(16))); hubert.reinterpretcast wrote: >

[PATCH] D53417: [Clang][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-10-24 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish updated this revision to Diff 170871. wuzish marked 2 inline comments as done. wuzish added a comment. Updated the diff. fix some points from comments. https://reviews.llvm.org/D53417 Files: clang/lib/Sema/SemaOverload.cpp clang/test/Sema/altivec-generic-overload.c Index:

[PATCH] D53417: [Clang][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-10-24 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish marked 8 inline comments as done. wuzish added inline comments. Comment at: clang/lib/Sema/SemaOverload.cpp:3941 + return ImplicitConversionSequence::Better; + } + hubert.reinterpretcast wrote: > This seems to duplicate the bug described here in >

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-01 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. Comment at: clang/lib/Sema/SemaOverload.cpp:3913 +for (auto Type : Types) { + if (S.Context.getCanonicalType(Type)->getTypeClass() != Type::Vector) +return false; hubert.reinterpretcast wrote: >

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-02 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. Comment at: clang/lib/Sema/SemaOverload.cpp:3913 +for (auto Type : Types) { + if (S.Context.getCanonicalType(Type)->getTypeClass() != Type::Vector) +return false; hubert.reinterpretcast wrote: > wuzish

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-10-25 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. Comment at: clang/lib/Sema/SemaOverload.cpp:3913 +for (auto Type : Types) { + if (S.Context.getCanonicalType(Type)->getTypeClass() != Type::Vector) +return false; hubert.reinterpretcast wrote: >

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-10-25 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. Comment at: clang/lib/Sema/SemaOverload.cpp:3913 +for (auto Type : Types) { + if (S.Context.getCanonicalType(Type)->getTypeClass() != Type::Vector) +return false; hubert.reinterpretcast wrote: > wuzish

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-10-25 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. Comment at: clang/lib/Sema/SemaOverload.cpp:3913 +for (auto Type : Types) { + if (S.Context.getCanonicalType(Type)->getTypeClass() != Type::Vector) +return false; hubert.reinterpretcast wrote: > wuzish

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-08 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added a comment. Gentle ping again since it's a critical patch. Could you please have a more review or give it LGTM if it's LGTM to you. Also welcome new comments. https://reviews.llvm.org/D53417 ___ cfe-commits mailing list

[PATCH] D54087: [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be modulo the number of bits in the element

2018-11-08 Thread Zixuan Wu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rL346471: [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be… (authored by wuzish, committed by ). Herald added a subscriber: llvm-commits. Changed prior to commit:

[PATCH] D54087: [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be modulo the number of bits in the element

2018-11-08 Thread Zixuan Wu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rC346471: [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be… (authored by wuzish, committed by ). Changed prior to commit: https://reviews.llvm.org/D54087?vs=172538=173262#toc

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-13 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. Comment at: clang/test/CodeGen/altivec-generic-overload.c:74 + convert1(gv1); + // CHECK: call void @_Z8convert1Dv16_a(<16 x i8> %{{[0-9]+}}) + convert1(gv2); hubert.reinterpretcast wrote: > Checking that the call is to the

[PATCH] D53417: [Clang][Sema]Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-15 Thread Zixuan Wu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. wuzish marked an inline comment as done. Closed by commit rC347019: [Clang][Sema]Choose a better candidate in overload function call if there is a… (authored by wuzish, committed by ). Changed prior to commit:

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-13 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish updated this revision to Diff 173981. wuzish added a comment. Use return type to distinguish which overload candidate is chosen because different candidate has different pointer return type which can not be converted implicitly without reporting error. https://reviews.llvm.org/D53417

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-13 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish marked an inline comment as done. wuzish added inline comments. Comment at: clang/test/SemaCXX/vector.cpp:26 float = f1(ll16); - f1(c16e); // expected-error{{call to 'f1' is ambiguous}} - f1(ll16e); // expected-error{{call to 'f1' is ambiguous}} + f1(c16e); +

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-08 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added a comment. In https://reviews.llvm.org/D53417#1292404, @rsmith wrote: > I like the direction here, and I'd like to see this applied generally: a > conversion sequence that bitcasts a vector should be ranked worse than one > that does not, regardless of the kind of vector in use.

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-08 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish updated this revision to Diff 173276. wuzish added a comment. Extend the scope to all vector type as one comment suggested. > a conversion sequence that bitcasts a vector should be ranked worse than one > that does not, regardless of the kind of vector in use. Which is also made code

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-08 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish marked 2 inline comments as done. wuzish added a comment. The updated patch now extended the scope and can include the case. https://reviews.llvm.org/D53417 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D54087: [PowerPC] [Clang] [AltiVec] The second parameter of vec_sr function should be modulo the number of bits in the element

2018-11-04 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish created this revision. wuzish added reviewers: hfinkel, nemanjai, kbarton. Herald added a subscriber: jsji. The second parameter of vec_sr function is representing shift bits and it should be modulo the number of bits in the element like what vec_sl does now. Repository: rC Clang

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-04 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish marked an inline comment as done. wuzish added inline comments. Comment at: clang/lib/Sema/SemaOverload.cpp:3913 +for (auto Type : Types) { + if (S.Context.getCanonicalType(Type)->getTypeClass() != Type::Vector) +return false;

[PATCH] D53417: [Clang][Sema][PowerPC] Choose a better candidate in overload function call if there is a compatible vector conversion instead of ambiguous call error

2018-11-04 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish marked an inline comment as done. wuzish added a comment. Gentle ping. Could anyone else have a more review? https://reviews.llvm.org/D53417 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D52074: [PowerPC] [Clang] Add vector int128 pack/unpack builtins

2018-09-13 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added a comment. Please make this patch commit after https://reviews.llvm.org/D52072 Repository: rC Clang https://reviews.llvm.org/D52074 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D52074: [PowerPC] [Clang] Add vector int128 pack/unpack builtins

2018-09-13 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish created this revision. wuzish added reviewers: hfinkel, nemanjai, kbarton. Herald added a subscriber: kristina. > unsigned long long __builtin_unpack_vector_int128 (vector __int128_t, int); > vector __int128_t __builtin_pack_vector_int128 (unsigned long long, unsigned > long long);

[PATCH] D52074: [PowerPC] [Clang] Add vector int128 pack/unpack builtins

2018-09-18 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added a comment. Herald added a subscriber: jsji. Please help me to commit this patch. Thanks a lot. Repository: rC Clang https://reviews.llvm.org/D52074 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[Diffusion] rL358949: [PowerPC] [Clang] Port MMX intrinsics and basic test cases to Power

2019-06-04 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added inline comments. /cfe/trunk/lib/Driver/ToolChains/PPCLinux.cpp:26 @hubert.reinterpretcast Thanks for your advice. I think the name `ppc_wrappers` is accurate to describe its meaning that wrapping the headers under standard library path or standard header search path. (Headers in

[PATCH] D62121: [PowerPC] [Clang] Port SSE intrinsics to PowerPC

2019-05-28 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added a comment. Thanks. I will commit for @qiucf Repository: rC Clang CHANGES SINCE LAST ACTION https://reviews.llvm.org/D62121/new/ https://reviews.llvm.org/D62121 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[Diffusion] rL358949: [PowerPC] [Clang] Port MMX intrinsics and basic test cases to Power

2019-06-05 Thread Zixuan Wu via Phabricator via cfe-commits
wuzish added a comment. > That (controlling within the headers) sounds good to me. When that lands, > then my understanding is that the `PPCLinuxToolChain` code would be adjusted > to include `ppc_wrappers` in the search path in the general case. Please let > me know if that's not the case.

[PATCH] D105168: [RISCV] Unify the arch string parsing logic to RISCVISAInfo.

2021-10-19 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp:107 + for (auto Feature : RISCVFeatureKV) { +if (FeatureBits[Feature.Value] && +llvm::RISCVISAInfo::isSupportedExtensionFeature(Feature.Key)) If

[PATCH] D70401: [WIP][RISCV] Implement ilp32e ABI

2021-12-06 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D70401#3172750 , @khchen wrote: > In D70401#3172457 , @zixuan-wu wrote: > >> Hi, all. Why is it not continued? > > Sorry, I have to work on other tasks so stop the rv32e implementation

[PATCH] D115923: [RISCV][Don't Commit] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-17 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu created this revision. zixuan-wu added reviewers: asb, craig.topper, kito-cheng, luismarques, apazos, jrtc27, Jim, akuegel, jhenderson, MaskRay, sjarus. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, vkmr, frasercrmck, evandro, sameer.abuasal, s.egerton,

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-20 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D115921#3201346 , @luismarques wrote: >> enable 'm' extension with passing mattr=+m After this patch, it would be >> -mattr=+m2p0. > > It's not obvious to me that support for extension versions should mean or has > to

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-27 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/include/llvm/Support/RISCVISAInfo.h:33 + bool operator!=(const RISCVExtensionVersion ) const { +return !operator==(Version); + } craig.topper wrote: > Use `!(*this == Version)` Good taste.

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-27 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 396147. zixuan-wu edited the summary of this revision. zixuan-wu added a comment. Address all comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115921/new/ https://reviews.llvm.org/D115921 Files: clang/lib/Basic/Targets/RISCV.cpp

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-27 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 396148. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115921/new/ https://reviews.llvm.org/D115921 Files: clang/lib/Basic/Targets/RISCV.cpp clang/lib/Driver/ToolChains/Arch/RISCV.cpp clang/test/Driver/riscv-arch-version.c

[PATCH] D95589: [RISCV] Support experimental 'P' extension 0.9

2021-12-31 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence. Could abandon it due to D108189 ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95589/new/

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-22 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 395803. zixuan-wu edited the summary of this revision. zixuan-wu added a comment. Address comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115921/new/ https://reviews.llvm.org/D115921 Files: clang/lib/Basic/Targets/RISCV.cpp

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-18 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu created this revision. zixuan-wu added reviewers: asb, craig.topper, kito-cheng, luismarques, apazos, jrtc27, Jim, akuegel. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence, armkevincheng, eric-k256, vkmr, frasercrmck, jdoerfert, evandro, sameer.abuasal,

[PATCH] D115923: [RISCV][Don't Commit] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-22 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu abandoned this revision. zixuan-wu added a comment. Only need review D115921 . Just abandon it. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115923/new/ https://reviews.llvm.org/D115923

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2021-12-23 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D115921#3206156 , @jrtc27 wrote: > Do not bring back V draft 0.7. It is gone, it will never be supported again > by LLVM under that name. The standard extension namespace is reserved for > ratified extensions and

[PATCH] D112921: [clang] Enable sized deallocation by default in C++14 onwards

2021-11-11 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Is this going to be reviewed again or committed? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D112921/new/ https://reviews.llvm.org/D112921 ___ cfe-commits mailing list

[PATCH] D8467: C++14: Disable sized deallocation by default due to ABI breakage

2021-11-11 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D8467#3125313 , @tstellar wrote: > In D8467#3095610 , @zixuan-wu wrote: > >> Hi, I am wondering could -fsized-deallocation this be enabled by default >> nowadays in 2021? > > Were you

[PATCH] D105168: [RISCV] Unify the arch string parsing logic to RISCVISAInfo.

2021-10-29 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added subscribers: VincentWu, luke957. Hi, @kito-cheng as your this patch unify the extension handing in one same place by new infra, are you going to support the multiple extension version in next step? Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D8467: C++14: Disable sized deallocation by default due to ABI breakage

2021-10-28 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added a subscriber: dang. Hi, I am wondering could -fsized-deallocation this be enabled by default nowadays in 2021? Repository: rL LLVM CHANGES SINCE LAST ACTION https://reviews.llvm.org/D8467/new/ https://reviews.llvm.org/D8467

[PATCH] D70401: [WIP][RISCV] Implement ilp32e ABI

2021-12-12 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a subscriber: pcwang-thead. zixuan-wu added a comment. In D70401#3175266 , @khchen wrote: >> Is it (D70401 ) good enough to solve or >> complete rv32e issue? > > It need to > > 1. disallow ilp32e ABI with

[PATCH] D108189: [RISCV] Support experimental 'P' extension 0.96

2021-12-13 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence. Hi, @Jim. What time is P extension going to upstream to community since it's been no update for some months? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D70401: [WIP][RISCV] Implement ilp32e ABI

2021-12-05 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added subscribers: VincentWu, luke957, achieveartificialintelligence. Hi, all. Why is it not continued? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70401/new/ https://reviews.llvm.org/D70401

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2022-01-05 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D115921#3224284 , @jrtc27 wrote: > but also with RISC-V extensions not being changed once ratified any more > (changes mean new extensions entirely, not new versions) I don't think so. Or why is there version in RISC-V

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2022-01-05 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: llvm/lib/Support/RISCVISAInfo.cpp:48 {"v", RISCVExtensionVersion{0, 10}}, +//{"v", RISCVExtensionVersion{0, 7}}, {"zba", RISCVExtensionVersion{1, 0}}, jrtc27 wrote: > Don't do this This nit will be

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2022-01-05 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. ping... CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115921/new/ https://reviews.llvm.org/D115921 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D115921: [RISCV] Refactor the RISCV ISA extension info and target features to support multiple extension version

2022-01-05 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D115921#3224329 , @jrtc27 wrote: > In D115921#3224324 , @zixuan-wu > wrote: > >> In D115921#3224284 , @jrtc27 wrote: >> >>> but also with

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-13 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/Driver/csky-arch.c:26 + +// RUN: %clang -target csky-unknown-elf -march=csky -### %s \ +// RUN: -fsyntax-only 2>&1 | FileCheck -check-prefix=CSKY %s rengolin wrote: > I don't think this is doing what you

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-13 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 415006. zixuan-wu added a comment. Herald added subscribers: llvm-commits, hiraditya. Herald added a project: LLVM. Address comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121445/new/ https://reviews.llvm.org/D121445 Files:

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-13 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/lib/Basic/Targets/CSKY.cpp:43 + Builder.defineMacro("__CSKYABI__", ABI == "abiv2" ? "2" : "1"); + Builder.defineMacro("__cskyabi__", ABI == "abiv2" ? "2" : "1"); + DavidSpickett wrote: > Any need to handle

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-16 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. I have updated the patch. Any more comments? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121445/new/ https://reviews.llvm.org/D121445 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-10 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu created this revision. zixuan-wu added reviewers: rengolin, kito.cheng, rsmith, asb, DavidSpickett, kaz7. Herald added subscribers: krytarowski, mgorny. Herald added a project: All. zixuan-wu requested review of this revision. Herald added a project: clang. Herald added a subscriber:

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-17 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D121445#3388842 , @rengolin wrote: > I'm surprised these tests are passing for you. Perhaps you're not building or > running them all. > > To make sure you're running your tests, you need to build both clang and llvm >

[PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation

2022-02-15 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. It's difficult to run llvm-test-suite in ilp32e abi in Linux. Because there are no workable environment such as runtime and kernel for ilp32e in GNU series tools. And we can not run llvm-test-suite in baremental environment(NOT linux but elf triple). So I have a

[PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation

2022-02-15 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu commandeered this revision. zixuan-wu added a reviewer: pcwang-thead. zixuan-wu added a comment. In D70401#3250049 , @khchen wrote: > 2. Have you try to run llvm-test-suite with rv32e config on qemu? It's difficult to run llvm-test-suite in

[PATCH] D70401: [RISCV] Complete RV32E/ilp32e implementation

2022-02-16 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Sorry for the wrong action of commandeer, @pcwang-thead will still be the author. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70401/new/ https://reviews.llvm.org/D70401 ___

[PATCH] D122160: [clang][extract-api] Refactor ExtractAPI and improve docs

2022-03-23 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp:159 + switch (Language) { + case Language::C: +return "c"; It's same name as `Language` variable above, and it cause compile error. @zixuw Maybe the

[PATCH] D122089: [CUDA] Add getTargetFeatures for the NVPTX toolchain

2022-03-23 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/lib/Driver/ToolChains/Cuda.cpp:648 +#define CASE_CUDA_VERSION(CUDA_VER, PTX_VER) \ + case CudaVersion::CUDA_##CUDA_VER: \ +PtxFeature = "+ptx"

[PATCH] D122089: [CUDA] Add getTargetFeatures for the NVPTX toolchain

2022-03-23 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/lib/Driver/ToolChains/Cuda.cpp:648 +#define CASE_CUDA_VERSION(CUDA_VER, PTX_VER) \ + case CudaVersion::CUDA_##CUDA_VER: \ +PtxFeature = "+ptx"

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-30 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 419076. zixuan-wu added a comment. Herald added subscribers: StephenFan, dexonsmith, MaskRay. Address comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D121445/new/ https://reviews.llvm.org/D121445 Files: clang/lib/Basic/CMakeLists.txt

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-03-30 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D121445#3416518 , @rengolin wrote: > There is also a test error: > > TEST 'Clang :: Driver/csky-toolchain.c' FAILED > > ... >

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-04-05 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D121445#3431569 , @dyung wrote: > Hi, one of the tests you added. csky-toolchain.c seems to be failing on a > Windows build bot, and from a quick look, it appears to be a path separator > issue. Can you take a look? > >

[PATCH] D121445: [Clang][CSKY] Add the CSKY target and compiler driver

2022-04-05 Thread Zixuan Wu via Phabricator via cfe-commits
This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG97e496054a37: [Clang][CSKY] Add the CSKY target and compiler driver (authored by zixuan-wu). Changed prior to commit:

[PATCH] D156363: [Driver] -###: exit with code 1 if hasErrorOccurred

2023-09-14 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added a subscriber: sunshaoce. I am afraid there is also error at clang/test/Driver/as-options.s when default triple is 'riscv32-unknown-elf' Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156363/new/

[PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs

2023-10-27 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu accepted this revision. zixuan-wu added a comment. This revision is now accepted and ready to land. LGTM if nobody objects. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70401/new/ https://reviews.llvm.org/D70401

[PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs

2023-10-08 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. ping? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70401/new/ https://reviews.llvm.org/D70401 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different

2022-05-16 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Gentle pin.. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124977/new/ https://reviews.llvm.org/D124977 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different

2022-05-17 Thread Zixuan Wu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rGdca37af061fb: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different (authored by zixuan-wu). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-29 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 432820. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126451/new/ https://reviews.llvm.org/D126451 Files: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGen/CSKY/csky-abi.c clang/test/CodeGen/CSKY/csky-hard-abi.c

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-30 Thread Zixuan Wu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes. Closed by commit rG563cc3fda9a2: [Clang][CSKY] Add support about CSKYABIInfo (authored by zixuan-wu). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126451/new/

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-26 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D126451#3539512 , @DavidSpickett wrote: > Can you reupload with more context? See > https://llvm.org/docs/Phabricator.html#requesting-a-review-via-the-web-interface > > I doubt I'll be able to give any in depth review but

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-26 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 432228. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126451/new/ https://reviews.llvm.org/D126451 Files: clang/lib/CodeGen/TargetInfo.cpp clang/test/CodeGen/CSKY/csky-abi.c clang/test/CodeGen/CSKY/csky-hard-abi.c Index:

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-26 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu created this revision. zixuan-wu added reviewers: rengolin, DavidSpickett. Herald added a project: All. zixuan-wu requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. According to the CSKY ABIv2 document

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-26 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D126451#3539656 , @rengolin wrote: > This looks good to me, but wait to make sure others see it, too. > > My reasons are: it is largely similar to RISCV implementation, it seems to > follow what I expected of the ABI (which

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-26 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. BTW, I have run llvm-test-suite, it passed. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D126451/new/ https://reviews.llvm.org/D126451 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D126451: [Clang][CSKY] Add support about CSKYABIInfo

2022-05-26 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/lib/CodeGen/TargetInfo.cpp:11708 + case llvm::Triple::csky: { +bool IsSoftFloat = !getTarget().hasFeature("hard-float-abi"); +bool hasFP64 = getTarget().hasFeature("fpuv2_df") || DavidSpickett wrote: >

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-07-18 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 445690. zixuan-wu added a comment. Remove unnecessary include header. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129824/new/ https://reviews.llvm.org/D129824 Files: clang/lib/Driver/Driver.cpp clang/test/Driver/riscv-abi.c

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-07-25 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D129824#3670586 , @reames wrote: > This was very briefly discussed at today's sync up call. We were running > short on time, so we didn't get a chance to talk through it, but there did > seem to be a consensus that

[PATCH] D54214: [RISCV] Set triple based on -march flag

2022-07-14 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Herald added subscribers: sunshaoce, pcwang-thead, eopXD, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, MaskRay, arichardson. Herald added a project: All. In D54214#1737255 , @simoncook wrote: >

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-07-14 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. In D129824#3653895 , @jrtc27 wrote: > Does GCC allow this or not? Because this strikes me as a bad idea at first > sight… GCC can deduce from -mcpu but not -mabi. > riscv64-unknown-linux-gnu-gcc a.c -mabi=ilp32 > cc1: error:

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-07-14 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu created this revision. zixuan-wu added reviewers: simoncook, lenary, asb. Herald added subscribers: sunshaoce, VincentWu, luke957, StephenFan, vkmr, frasercrmck, evandro, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult,

[PATCH] D93138: Add initial support for multilibs in Baremetal toolchain.

2022-07-26 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Herald added subscribers: pcwang-thead, luke957, StephenFan, MaskRay, arichardson. Herald added a project: All. Comment at: clang/lib/Driver/ToolChains/BareMetal.cpp:177 if (!getDriver().SysRoot.empty()) -return getDriver().SysRoot; +

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-07-18 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/lib/Driver/Driver.cpp:660 + +if (RVArch == llvm::Triple::riscv64 && +ArchName.startswith_insensitive("rv32")) eopXD wrote: > Do we need to throw error (or warning) when these two (`RVArch` and >

[PATCH] D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different

2022-05-06 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/Sema/builtin-alloca-with-align.c:32 void test8(void) { +#if defined(__csky__) __builtin_alloca_with_align(sizeof(__INT64_TYPE__), __alignof__(__INT64_TYPE__)); // expected-warning {{second argument to

[PATCH] D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different

2022-05-11 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu updated this revision to Diff 428585. zixuan-wu added a comment. Address comments. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124977/new/ https://reviews.llvm.org/D124977 Files: clang/test/CodeGen/c-strings.c clang/test/Sema/builtin-alloca-with-align.c Index:

[PATCH] D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different

2022-05-11 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added inline comments. Comment at: clang/test/Sema/builtin-alloca-with-align.c:32 void test8(void) { +#if defined(__csky__) __builtin_alloca_with_align(sizeof(__INT64_TYPE__), __alignof__(__INT64_TYPE__)); // expected-warning {{second argument to

[PATCH] D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different

2022-05-08 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu added a comment. Could anybody else have a review or nominate a reviewer? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124977/new/ https://reviews.llvm.org/D124977 ___ cfe-commits mailing

[PATCH] D124977: [NFC][Clang] Modify expect of fail test or XFAIL because CSKY align is different

2022-05-04 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu created this revision. zixuan-wu added reviewers: majnemer, kparzysz, ddunbar. Herald added a project: All. zixuan-wu requested review of this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. CSKY is always in 4-byte align, no matter it's long long type.

[PATCH] D129824: [RISCV] Set triple based on -march flag which can be deduced in more generic way

2022-08-23 Thread Zixuan Wu via Phabricator via cfe-commits
zixuan-wu marked an inline comment as not done. zixuan-wu added a comment. ping... CHANGES SINCE LAST ACTION https://reviews.llvm.org/D129824/new/ https://reviews.llvm.org/D129824 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

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