[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

2021-04-14 Thread Thomas Lively via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rGaf7ab81ce310: [WebAssembly] Use standard intrinsics for 
f32x4 and f64x2 ops (authored by tlively).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100411/new/

https://reviews.llvm.org/D100411

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-wasm.c
  llvm/include/llvm/IR/IntrinsicsWebAssembly.td
  llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
  llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
  llvm/test/CodeGen/WebAssembly/simd-unsupported.ll

Index: llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
===
--- llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
+++ llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
@@ -366,38 +366,6 @@
 ; 4 x f32
 ; ==
 
-; CHECK-LABEL: ceil_v4f32:
-; CHECK: f32.ceil
-declare <4 x float> @llvm.ceil.v4f32(<4 x float>)
-define <4 x float> @ceil_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.ceil.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
-; CHECK-LABEL: floor_v4f32:
-; CHECK: f32.floor
-declare <4 x float> @llvm.floor.v4f32(<4 x float>)
-define <4 x float> @floor_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.floor.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
-; CHECK-LABEL: trunc_v4f32:
-; CHECK: f32.trunc
-declare <4 x float> @llvm.trunc.v4f32(<4 x float>)
-define <4 x float> @trunc_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.trunc.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
-; CHECK-LABEL: nearbyint_v4f32:
-; CHECK: f32.nearest
-declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>)
-define <4 x float> @nearbyint_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
 ; CHECK-LABEL: copysign_v4f32:
 ; CHECK: f32.copysign
 declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>)
@@ -498,38 +466,6 @@
 ; 2 x f64
 ; ==
 
-; CHECK-LABEL: ceil_v2f64:
-; CHECK: f64.ceil
-declare <2 x double> @llvm.ceil.v2f64(<2 x double>)
-define <2 x double> @ceil_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.ceil.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
-; CHECK-LABEL: floor_v2f64:
-; CHECK: f64.floor
-declare <2 x double> @llvm.floor.v2f64(<2 x double>)
-define <2 x double> @floor_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.floor.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
-; CHECK-LABEL: trunc_v2f64:
-; CHECK: f64.trunc
-declare <2 x double> @llvm.trunc.v2f64(<2 x double>)
-define <2 x double> @trunc_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.trunc.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
-; CHECK-LABEL: nearbyint_v2f64:
-; CHECK: f64.nearest
-declare <2 x double> @llvm.nearbyint.v2f64(<2 x double>)
-define <2 x double> @nearbyint_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
 ; CHECK-LABEL: copysign_v2f64:
 ; CHECK: f64.copysign
 declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>)
Index: llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
===
--- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -722,9 +722,9 @@
 ; CHECK-NEXT: .functype ceil_v4f32 (v128) -> (v128){{$}}
 ; CHECK-NEXT: f32x4.ceil $push[[R:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-declare <4 x float> @llvm.wasm.ceil.v4f32(<4 x float>)
+declare <4 x float> @llvm.ceil.v4f32(<4 x float>)
 define <4 x float> @ceil_v4f32(<4 x float> %a) {
-  %v = call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %a)
+  %v = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
   ret <4 x float> %v
 }
 
@@ -732,9 +732,9 @@
 ; CHECK-NEXT: .functype floor_v4f32 (v128) -> (v128){{$}}
 ; CHECK-NEXT: f32x4.floor $push[[R:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-declare <4 x float> @llvm.wasm.floor.v4f32(<4 x float>)
+declare <4 x float> @llvm.floor.v4f32(<4 x float>)
 define <4 x float> @floor_v4f32(<4 x float> %a) {
-  %v = call <4 x float> @llvm.wasm.floor.v4f32(<4 x float> %a)
+  %v = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
   ret <4 x float> %v
 }
 
@@ -742,9 +742,9 @@
 ; CHECK-NEXT: .functype trunc_v4f32 (v128) -> (v128){{$}}
 ; CHECK-NEXT: f32x4.trunc $push[[R:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-declare <4 x float> @llvm.wasm.trunc.v4f32(<4 x float>)
+declare <4 x float> @llvm.trunc.v4f32(<4 x float>)
 define <4 x float> @trunc_v4f32(<4 x float> %a) {
-  %v = call <4 x float> @llvm.wasm.trunc.v4f32(<4 x float> %a)
+  %v = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
   ret <4 x

[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

2021-04-13 Thread Dan Gohman via Phabricator via cfe-commits 
sunfish added a comment.

Great, thanks! And yes, switching to roundeven for both scalar and SIMD ISel 
sounds right to me.


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[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

2021-04-13 Thread Thomas Lively via Phabricator via cfe-commits 
tlively added a comment.

The Wasm rounding semantics 
(https://webassembly.github.io/spec/core/exec/numerics.html#op-fnearest) are 
essentially the same as the semantics for roundeven 
(https://llvm.org/docs/LangRef.html#llvm-roundeven-intrinsic, added to LLVM in 
May 2020), so that would be the logical ISD opcode to use. Nearbyint is less 
appropriate because its behavior is supposed to depend on the current rounding 
mode. Arguably this is fine because Wasm only has the one rounding mode, but 
roundeven is more unambiguously correct. However, the ISel for f32.nearest and 
f64.nearest predates roundeven being available in LLVM and uses nearbyint 
instead, so I'm just matching that here. If folks think it's a good idea, I 
will make a follow-up PR that switches to using roundeven for both scalar and 
SIMD ISel.


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[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

2021-04-13 Thread Dan Gohman via Phabricator via cfe-commits 
sunfish accepted this revision.
sunfish added a comment.
This revision is now accepted and ready to land.

This looks good to me! Could you briefly comment here on what the issue with 
`llvm.roundeven` is?


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[PATCH] D100411: [WebAssembly] Use standard intrinsics for f32x4 and f64x2 ops

2021-04-13 Thread Thomas Lively via Phabricator via cfe-commits 
tlively created this revision.
tlively added reviewers: aheejin, dschuff.
Herald added subscribers: wingo, ecnelises, sunfish, hiraditya, 
jgravelle-google, sbc100.
tlively requested review of this revision.
Herald added projects: clang, LLVM.
Herald added subscribers: llvm-commits, cfe-commits.

Now that these instructions are no longer prototypes, we do not need to be
careful about keeping them opt-in and can use the standard LLVM infrastructure
for them. This commit removes the bespoke intrinsics we were using to represent
these operations in favor of the corresponding target-independent intrinsics.
The clang builtins are preserved because there is no standard way to easily
represent these operations in C/C++.

For consistency with the scalar codegen in the Wasm backend, the intrinsic used
to represent {f32x4,f64x2}.nearest is @llvm.nearbyint even though
@llvm.roundeven better captures the semantics of the underlying Wasm
instruction. Replacing our use of @llvm.nearbyint with use of @llvm.roundeven is
left to a potential future patch.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D100411

Files:
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/test/CodeGen/builtins-wasm.c
  llvm/include/llvm/IR/IntrinsicsWebAssembly.td
  llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
  llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
  llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
  llvm/test/CodeGen/WebAssembly/simd-unsupported.ll

Index: llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
===
--- llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
+++ llvm/test/CodeGen/WebAssembly/simd-unsupported.ll
@@ -366,38 +366,6 @@
 ; 4 x f32
 ; ==
 
-; CHECK-LABEL: ceil_v4f32:
-; CHECK: f32.ceil
-declare <4 x float> @llvm.ceil.v4f32(<4 x float>)
-define <4 x float> @ceil_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.ceil.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
-; CHECK-LABEL: floor_v4f32:
-; CHECK: f32.floor
-declare <4 x float> @llvm.floor.v4f32(<4 x float>)
-define <4 x float> @floor_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.floor.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
-; CHECK-LABEL: trunc_v4f32:
-; CHECK: f32.trunc
-declare <4 x float> @llvm.trunc.v4f32(<4 x float>)
-define <4 x float> @trunc_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.trunc.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
-; CHECK-LABEL: nearbyint_v4f32:
-; CHECK: f32.nearest
-declare <4 x float> @llvm.nearbyint.v4f32(<4 x float>)
-define <4 x float> @nearbyint_v4f32(<4 x float> %x) {
-  %v = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %x)
-  ret <4 x float> %v
-}
-
 ; CHECK-LABEL: copysign_v4f32:
 ; CHECK: f32.copysign
 declare <4 x float> @llvm.copysign.v4f32(<4 x float>, <4 x float>)
@@ -498,38 +466,6 @@
 ; 2 x f64
 ; ==
 
-; CHECK-LABEL: ceil_v2f64:
-; CHECK: f64.ceil
-declare <2 x double> @llvm.ceil.v2f64(<2 x double>)
-define <2 x double> @ceil_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.ceil.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
-; CHECK-LABEL: floor_v2f64:
-; CHECK: f64.floor
-declare <2 x double> @llvm.floor.v2f64(<2 x double>)
-define <2 x double> @floor_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.floor.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
-; CHECK-LABEL: trunc_v2f64:
-; CHECK: f64.trunc
-declare <2 x double> @llvm.trunc.v2f64(<2 x double>)
-define <2 x double> @trunc_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.trunc.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
-; CHECK-LABEL: nearbyint_v2f64:
-; CHECK: f64.nearest
-declare <2 x double> @llvm.nearbyint.v2f64(<2 x double>)
-define <2 x double> @nearbyint_v2f64(<2 x double> %x) {
-  %v = call <2 x double> @llvm.nearbyint.v2f64(<2 x double> %x)
-  ret <2 x double> %v
-}
-
 ; CHECK-LABEL: copysign_v2f64:
 ; CHECK: f64.copysign
 declare <2 x double> @llvm.copysign.v2f64(<2 x double>, <2 x double>)
Index: llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
===
--- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+++ llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
@@ -722,9 +722,9 @@
 ; CHECK-NEXT: .functype ceil_v4f32 (v128) -> (v128){{$}}
 ; CHECK-NEXT: f32x4.ceil $push[[R:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
-declare <4 x float> @llvm.wasm.ceil.v4f32(<4 x float>)
+declare <4 x float> @llvm.ceil.v4f32(<4 x float>)
 define <4 x float> @ceil_v4f32(<4 x float> %a) {
-  %v = call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %a)
+  %v = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
   ret <4 x float> %v
 }
 
@@ -732,9 +732,9 @@
 ; CHECK-NEXT: .functype floor_v4f32 (v128) -> (v128){{$}}
 ; CHECK-NEXT: f32x4.floor $push[[R:[0-9]+]]=, $0{{$}}
 ; CHECK-NEXT: