[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Yaxun Liu via Phabricator via cfe-commits]

yaxunl added a comment.

In D120366#3345401 , @yaxunl wrote:

> In D120366#3344428 , @shangwuyao 
> wrote:
>
>> @yaxunl I saw that you added the test recently, could you provide some 
>> context? I think this test is broken at HEAD as I saw it is broken for other 
>> patches (see this build 
>> ) as well.
>
> which test?

OK. I saw it. Thanks for handling it. I will fix it.


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[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Yaxun Liu via Phabricator via cfe-commits]

yaxunl added a comment.

In D120366#3344428 , @shangwuyao 
wrote:

> @yaxunl I saw that you added the test recently, could you provide some 
> context? I think this test is broken at HEAD as I saw it is broken for other 
> patches (see this build 
> ) as well.

which test?


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[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Justin Lebar via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc2f501f39589: [CUDA][SPIRV] Assign global address space to 
CUDA kernel arguments (authored by shangwuyao, committed by jlebar).

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Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenCUDASPIRV/kernel-argument.cu


Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define
+// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@
 }
 
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
-  if (getContext().getLangOpts().HIP) {
+  if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
-// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
-// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+// pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
+// SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address 
space.
 llvm::Type *LTy = CGT.ConvertType(Ty);
 auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
 auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -144,16 +144,16 @@
 // FIXME: SYCL specification considers unannotated pointers and references
 // to be pointing to the generic address space. See section 5.9.3 of
 // SYCL 2020 specification.
-// Currently, there is no way of representing SYCL's and HIP's default
+// Currently, there is no way of representing SYCL's and HIP/CUDA's default
 // address space language semantic along with the semantics of embedded C's
 // default address space in the same address space map. Hence the map needs
 // to be reset to allow mapping to the desired value of 'Default' entry for
-// SYCL and HIP.
+// SYCL and HIP/CUDA.
 setAddressSpaceMap(
 /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
-// The address mapping from HIP language for device code is only 
defined
-// for SPIR-V.
-(getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice));
+// The address mapping from HIP/CUDA language for device code is only
+// defined for SPIR-V.
+(getTriple().isSPIRV() && Opts.CUDAIsDevice));
   }
 
   void setSupportedOpenCLOpts() override {


Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define
+// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@
 }
 
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
-  if (getContext().getLangOpts().HIP) {
+  if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
-   

[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Justin Lebar via Phabricator via cfe-commits]

jlebar accepted this revision.
jlebar added a comment.
This revision is now accepted and ready to land.

I'll land this for you.


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[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Shangwu Yao via Phabricator via cfe-commits]

shangwuyao added a comment.

@yaxunl I saw that you added the test recently, could you provide some context? 
I think this test is broken at HEAD as I saw it is broken for other patches 
(see this build ) as well.


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[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Shangwu Yao via Phabricator via cfe-commits]

shangwuyao updated this revision to Diff 411258.
shangwuyao added a comment.

Disabling the test failing at HEAD with a separate patch.


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Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenCUDASPIRV/kernel-argument.cu


Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define
+// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@
 }
 
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
-  if (getContext().getLangOpts().HIP) {
+  if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
-// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
-// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+// pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
+// SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address 
space.
 llvm::Type *LTy = CGT.ConvertType(Ty);
 auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
 auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -144,16 +144,16 @@
 // FIXME: SYCL specification considers unannotated pointers and references
 // to be pointing to the generic address space. See section 5.9.3 of
 // SYCL 2020 specification.
-// Currently, there is no way of representing SYCL's and HIP's default
+// Currently, there is no way of representing SYCL's and HIP/CUDA's default
 // address space language semantic along with the semantics of embedded C's
 // default address space in the same address space map. Hence the map needs
 // to be reset to allow mapping to the desired value of 'Default' entry for
-// SYCL and HIP.
+// SYCL and HIP/CUDA.
 setAddressSpaceMap(
 /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
-// The address mapping from HIP language for device code is only 
defined
-// for SPIR-V.
-(getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice));
+// The address mapping from HIP/CUDA language for device code is only
+// defined for SPIR-V.
+(getTriple().isSPIRV() && Opts.CUDAIsDevice));
   }
 
   void setSupportedOpenCLOpts() override {


Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define
+// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@
 }
 
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
-  if (getContext().getLangOpts().HIP) {
+  if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
-// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
-// maps cuda_device to SPIR-V's CrossWorkGroup address 

[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Shangwu Yao via Phabricator via cfe-commits]

shangwuyao added a comment.

In D120366#3344221 , @jlebar wrote:

> - What's different in this patch vs the previous one?

Previous patch broke at two different post-commit build configurations. The 
generated SPIR-V are:

  define hidden spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef 
%output.coerce) #0 {

  define spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef %0) #0 {

And the original test:

  // CHECK: define spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef 
%output.coerce)

Changed that to below so that it could handle those two build configurations 
correctly.

  // CHECK: define
  // CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef

(The previous reverted patch could have been reopened so that the change is 
more clear, but didn't know such option exist until recently.)

> - *Disabled a hip test on Windows that's breaking on head.* Can you clarify: 
> Is this test broken at HEAD, or does it break with your patch?
>
>   If it's broken at HEAD, then it should be disabled in a separate patch.
>
>   If it breaks with your patch, can you explain why it should be disabled 
> rather than fixed?

It is broken at HEAD, will add another patch.


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[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Justin Lebar via Phabricator via cfe-commits]

jlebar added a comment.

- What's different in this patch vs the previous one?
- *Disabled a hip test on Windows that's breaking on head.* Can you clarify: Is 
this test broken at HEAD, or does it break with your patch?

  If it's broken at HEAD, then it should be disabled in a separate patch.

  If it breaks with your patch, can you explain why it should be disabled 
rather than fixed?


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[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Shangwu Yao via Phabricator via cfe-commits]

shangwuyao updated this revision to Diff 411241.
shangwuyao added a comment.

Disabled a hip test on Windows that's breaking on head.


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Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenCUDASPIRV/kernel-argument.cu
  clang/test/Driver/hip-link-bundle-archive.hip


Index: clang/test/Driver/hip-link-bundle-archive.hip
===
--- clang/test/Driver/hip-link-bundle-archive.hip
+++ clang/test/Driver/hip-link-bundle-archive.hip
@@ -1,4 +1,5 @@
 // REQUIRES: clang-driver, x86-registered-target, amdgpu-registered-target
+// UNSUPPORTED: system-windows
 
 // RUN: touch %T/libhipBundled.a
 
Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define
+// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@
 }
 
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
-  if (getContext().getLangOpts().HIP) {
+  if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
-// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
-// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+// pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
+// SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address 
space.
 llvm::Type *LTy = CGT.ConvertType(Ty);
 auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
 auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -144,16 +144,16 @@
 // FIXME: SYCL specification considers unannotated pointers and references
 // to be pointing to the generic address space. See section 5.9.3 of
 // SYCL 2020 specification.
-// Currently, there is no way of representing SYCL's and HIP's default
+// Currently, there is no way of representing SYCL's and HIP/CUDA's default
 // address space language semantic along with the semantics of embedded C's
 // default address space in the same address space map. Hence the map needs
 // to be reset to allow mapping to the desired value of 'Default' entry for
-// SYCL and HIP.
+// SYCL and HIP/CUDA.
 setAddressSpaceMap(
 /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
-// The address mapping from HIP language for device code is only 
defined
-// for SPIR-V.
-(getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice));
+// The address mapping from HIP/CUDA language for device code is only
+// defined for SPIR-V.
+(getTriple().isSPIRV() && Opts.CUDAIsDevice));
   }
 
   void setSupportedOpenCLOpts() override {


Index: clang/test/Driver/hip-link-bundle-archive.hip
===
--- clang/test/Driver/hip-link-bundle-archive.hip
+++ clang/test/Driver/hip-link-bundle-archive.hip
@@ -1,4 +1,5 @@
 // REQUIRES: clang-driver, x86-registered-target, amdgpu-registered-target
+// UNSUPPORTED: system-windows
 
 // RUN: touch %T/libhipBundled.a
 
Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc 

[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Shangwu Yao via Phabricator via cfe-commits]

shangwuyao added a comment.

Looking into the (new) build failure on Windows, since the change has already 
been reviewed, will try to commit after resolving the build failure.


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[PATCH] D120366: [CUDA][SPIRV] Assign global address space to CUDA kernel arguments

[Shangwu Yao via Phabricator via cfe-commits]

shangwuyao created this revision.
shangwuyao added reviewers: jlebar, tra, yaxunl.
Herald added subscribers: carlosgalvezp, ThomasRaoux, Anastasia.
shangwuyao requested review of this revision.
Herald added a project: clang.
Herald added a subscriber: cfe-commits.

This patch converts CUDA pointer kernel arguments with default address space to
CrossWorkGroup address space (__global in OpenCL). This is because Generic or
Function (OpenCL's private) is not supported as storage class for kernel 
pointer types.


Repository:
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Files:
  clang/lib/Basic/Targets/SPIR.h
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGenCUDASPIRV/kernel-argument.cu


Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define
+// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@
 }
 
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
-  if (getContext().getLangOpts().HIP) {
+  if (getContext().getLangOpts().CUDAIsDevice) {
 // Coerce pointer arguments with default address space to CrossWorkGroup
-// pointers for HIPSPV. When the language mode is HIP, the SPIRTargetInfo
-// maps cuda_device to SPIR-V's CrossWorkGroup address space.
+// pointers for HIPSPV/CUDASPV. When the language mode is HIP/CUDA, the
+// SPIRTargetInfo maps cuda_device to SPIR-V's CrossWorkGroup address 
space.
 llvm::Type *LTy = CGT.ConvertType(Ty);
 auto DefaultAS = getContext().getTargetAddressSpace(LangAS::Default);
 auto GlobalAS = getContext().getTargetAddressSpace(LangAS::cuda_device);
Index: clang/lib/Basic/Targets/SPIR.h
===
--- clang/lib/Basic/Targets/SPIR.h
+++ clang/lib/Basic/Targets/SPIR.h
@@ -144,16 +144,16 @@
 // FIXME: SYCL specification considers unannotated pointers and references
 // to be pointing to the generic address space. See section 5.9.3 of
 // SYCL 2020 specification.
-// Currently, there is no way of representing SYCL's and HIP's default
+// Currently, there is no way of representing SYCL's and HIP/CUDA's default
 // address space language semantic along with the semantics of embedded C's
 // default address space in the same address space map. Hence the map needs
 // to be reset to allow mapping to the desired value of 'Default' entry for
-// SYCL and HIP.
+// SYCL and HIP/CUDA.
 setAddressSpaceMap(
 /*DefaultIsGeneric=*/Opts.SYCLIsDevice ||
-// The address mapping from HIP language for device code is only 
defined
-// for SPIR-V.
-(getTriple().isSPIRV() && Opts.HIP && Opts.CUDAIsDevice));
+// The address mapping from HIP/CUDA language for device code is only
+// defined for SPIR-V.
+(getTriple().isSPIRV() && Opts.CUDAIsDevice));
   }
 
   void setSupportedOpenCLOpts() override {


Index: clang/test/CodeGenCUDASPIRV/kernel-argument.cu
===
--- /dev/null
+++ clang/test/CodeGenCUDASPIRV/kernel-argument.cu
@@ -0,0 +1,18 @@
+// Tests CUDA kernel arguments get global address space when targetting SPIR-V.
+
+// REQUIRES: clang-driver
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv32 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// RUN: %clang -emit-llvm --cuda-device-only --offload=spirv64 \
+// RUN:   -nocudalib -nocudainc %s -o %t.bc -c 2>&1
+// RUN: llvm-dis %t.bc -o %t.ll
+// RUN: FileCheck %s --input-file=%t.ll
+
+// CHECK: define
+// CHECK-SAME: spir_kernel void @_Z6kernelPi(i32 addrspace(1)* noundef
+
+__attribute__((global)) void kernel(int* output) { *output = 1; }
Index: clang/lib/CodeGen/TargetInfo.cpp
===
--- clang/lib/CodeGen/TargetInfo.cpp
+++ clang/lib/CodeGen/TargetInfo.cpp
@@ -10320,10 +10320,10 @@
 }
 
 ABIArgInfo SPIRVABIInfo::classifyKernelArgumentType(QualType Ty) const {
-