This revision was automatically updated to reflect the committed changes.
Closed by commit rL310191: [X86] Enable isel to use the PAUSE instruction even
when SSE2 is disabled. (authored by ctopper).
Changed prior to commit:
https://reviews.llvm.org/D36362?vs=109896=109902#toc
Repository:
rL
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
LGTM
https://reviews.llvm.org/D36362
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craig.topper updated this revision to Diff 109896.
craig.topper added a comment.
Add test case
https://reviews.llvm.org/D36362
Files:
include/clang/Basic/BuiltinsX86.def
test/CodeGen/pause.c
Index: test/CodeGen/pause.c
===
RKSimon added a comment.
Codegen test case on no-sse2 target?
https://reviews.llvm.org/D36362
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craig.topper created this revision.
On older processors this instruction encoding is treated as a NOP.
MSVC doesn't disable intrinsics based on features the way clang/gcc does.
Because the PAUSE instruction encoding doesn't crash older processors, some
software out there uses these intrinsics