[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Dave Green via Phabricator via cfe-commits 
dmgreen added a comment.

Hello. Hopefully fixed in rC362814 !


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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Nico Weber via Phabricator via cfe-commits 
thakis added a comment.

The test is failing on some bots, e.g. 
http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/13430/steps/test-stage1-compiler/logs/stdio

  
/home/buildslave/buildslave1a/clang-with-lto-ubuntu/llvm.src/tools/clang/test/Preprocessor/arm-target-features.c:762:20:
 error: CHECK-V81M-MVE: expected string not found in input
  // CHECK-V81M-MVE: #define __ARM_FEATURE_MVE 1
 ^
  :16:1: note: scanning from here
  #define __ARM_FEATURE_FMA 1
  ^
  :20:1: note: possible intended match here
  #define __ARM_FEATURE_MVE 3
  ^


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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Sjoerd Meijer via Phabricator via cfe-commits 
This revision was automatically updated to reflect the committed changes.
Closed by commit rL362806: [ARM] Add ACLE feature macros for MVE (authored by 
SjoerdMeijer, committed by ).
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D60710?vs=203555=203561#toc

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Files:
  cfe/trunk/lib/Basic/Targets/ARM.cpp
  cfe/trunk/lib/Basic/Targets/ARM.h
  cfe/trunk/test/Preprocessor/arm-target-features.c

Index: cfe/trunk/test/Preprocessor/arm-target-features.c
===
--- cfe/trunk/test/Preprocessor/arm-target-features.c
+++ cfe/trunk/test/Preprocessor/arm-target-features.c
@@ -748,6 +748,27 @@
 // KRAIT-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1
 // KRAIT-ALLOW-FP-INSTR:#define  __ARM_VFPV4__ 1
 
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M %s
+// CHECK-V81M: #define __ARM_ARCH 8
+// CHECK-V81M: #define __ARM_ARCH_8_1M_MAIN__ 1
+// CHECK-V81M: #define __ARM_ARCH_ISA_THUMB 2
+// CHECK-V81M: #define __ARM_ARCH_PROFILE 'M'
+// CHECK-V81M-NOT: #define __ARM_FEATURE_DSP
+// CHECK-V81M-NOT: #define __ARM_FEATURE_MVE
+// CHECK-V81M-NOT: #define __ARM_FEATURE_SIMD32
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE %s
+// CHECK-V81M-MVE: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_MVE 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_SIMD32 1
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE-FP %s
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_MVE 3
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_SIMD32 1
+// CHECK-V81M-MVE-FP: #define __ARM_FPV5__ 1
+
 // RUN: %clang -target armv8.1a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81A %s
 // CHECK-V81A: #define __ARM_ARCH 8
 // CHECK-V81A: #define __ARM_ARCH_8_1A__ 1
Index: cfe/trunk/lib/Basic/Targets/ARM.h
===
--- cfe/trunk/lib/Basic/Targets/ARM.h
+++ cfe/trunk/lib/Basic/Targets/ARM.h
@@ -33,6 +33,11 @@
 FPARMV8 = (1 << 4)
   };
 
+  enum MVEMode {
+  MVE_INT = (1 << 0),
+  MVE_FP  = (1 << 1)
+  };
+
   // Possible HWDiv features.
   enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
 
@@ -56,6 +61,7 @@
   unsigned ArchVersion;
 
   unsigned FPU : 5;
+  unsigned MVE : 2;
 
   unsigned IsAAPCS : 1;
   unsigned HWDiv : 2;
@@ -100,6 +106,8 @@
   bool isThumb() const;
   bool supportsThumb() const;
   bool supportsThumb2() const;
+  bool hasMVE() const;
+  bool hasMVEFloat() const;
 
   StringRef getCPUAttr() const;
   StringRef getCPUProfile() const;
Index: cfe/trunk/lib/Basic/Targets/ARM.cpp
===
--- cfe/trunk/lib/Basic/Targets/ARM.cpp
+++ cfe/trunk/lib/Basic/Targets/ARM.cpp
@@ -146,6 +146,14 @@
   }
 }
 
+bool ARMTargetInfo::hasMVE() const {
+  return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0;
+}
+
+bool ARMTargetInfo::hasMVEFloat() const {
+  return hasMVE() && (MVE & MVE_FP);
+}
+
 bool ARMTargetInfo::isThumb() const {
   return ArchISA == llvm::ARM::ISAKind::THUMB;
 }
@@ -460,6 +468,15 @@
   HasLegalHalfType = true;
 } else if (Feature == "+dotprod") {
   DotProd = true;
+} else if (Feature == "+mve") {
+  DSP = 1;
+  MVE |= MVE_INT;
+} else if (Feature == "+mve.fp") {
+  DSP = 1;
+  HasLegalHalfType = true;
+  FPU |= FPARMV8;
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }
   }
 
@@ -510,6 +527,7 @@
   .Case("vfp", FPU && !SoftFloat)
   .Case("hwdiv", HWDiv & HWDivThumb)
   .Case("hwdiv-arm", HWDiv & HWDivARM)
+  .Case("mve", hasMVE())
   .Default(false);
 }
 
@@ -725,6 +743,10 @@
 "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
   }
 
+  if (hasMVE()) {
+Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1");
+  }
+
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
   Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 
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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Sjoerd Meijer via Phabricator via cfe-commits 
SjoerdMeijer added a comment.

Thanks for reviewing!


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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Oliver Stannard (Linaro) via Phabricator via cfe-commits 
ostannard accepted this revision.
ostannard added a comment.
This revision is now accepted and ready to land.

LGTM


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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Sjoerd Meijer via Phabricator via cfe-commits 
SjoerdMeijer updated this revision to Diff 203555.
SjoerdMeijer added a comment.

Yep, sorry, missed that one.


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Files:
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/ARM.h
  clang/test/Preprocessor/arm-target-features.c

Index: clang/test/Preprocessor/arm-target-features.c
===
--- clang/test/Preprocessor/arm-target-features.c
+++ clang/test/Preprocessor/arm-target-features.c
@@ -748,6 +748,27 @@
 // KRAIT-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1
 // KRAIT-ALLOW-FP-INSTR:#define  __ARM_VFPV4__ 1
 
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M %s
+// CHECK-V81M: #define __ARM_ARCH 8
+// CHECK-V81M: #define __ARM_ARCH_8_1M_MAIN__ 1
+// CHECK-V81M: #define __ARM_ARCH_ISA_THUMB 2
+// CHECK-V81M: #define __ARM_ARCH_PROFILE 'M'
+// CHECK-V81M-NOT: #define __ARM_FEATURE_DSP
+// CHECK-V81M-NOT: #define __ARM_FEATURE_MVE
+// CHECK-V81M-NOT: #define __ARM_FEATURE_SIMD32
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE %s
+// CHECK-V81M-MVE: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_MVE 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_SIMD32 1
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE-FP %s
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_MVE 3
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_SIMD32 1
+// CHECK-V81M-MVE-FP: #define __ARM_FPV5__ 1
+
 // RUN: %clang -target armv8.1a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81A %s
 // CHECK-V81A: #define __ARM_ARCH 8
 // CHECK-V81A: #define __ARM_ARCH_8_1A__ 1
Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -33,6 +33,11 @@
 FPARMV8 = (1 << 4)
   };
 
+  enum MVEMode {
+  MVE_INT = (1 << 0),
+  MVE_FP  = (1 << 1)
+  };
+
   // Possible HWDiv features.
   enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
 
@@ -56,6 +61,7 @@
   unsigned ArchVersion;
 
   unsigned FPU : 5;
+  unsigned MVE : 2;
 
   unsigned IsAAPCS : 1;
   unsigned HWDiv : 2;
@@ -100,6 +106,8 @@
   bool isThumb() const;
   bool supportsThumb() const;
   bool supportsThumb2() const;
+  bool hasMVE() const;
+  bool hasMVEFloat() const;
 
   StringRef getCPUAttr() const;
   StringRef getCPUProfile() const;
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -146,6 +146,14 @@
   }
 }
 
+bool ARMTargetInfo::hasMVE() const {
+  return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0;
+}
+
+bool ARMTargetInfo::hasMVEFloat() const {
+  return hasMVE() && (MVE & MVE_FP);
+}
+
 bool ARMTargetInfo::isThumb() const {
   return ArchISA == llvm::ARM::ISAKind::THUMB;
 }
@@ -448,6 +456,15 @@
   HasLegalHalfType = true;
 } else if (Feature == "+dotprod") {
   DotProd = true;
+} else if (Feature == "+mve") {
+  DSP = 1;
+  MVE |= MVE_INT;
+} else if (Feature == "+mve.fp") {
+  DSP = 1;
+  HasLegalHalfType = true;
+  FPU |= FPARMV8;
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }
   }
 
@@ -498,6 +515,7 @@
   .Case("vfp", FPU && !SoftFloat)
   .Case("hwdiv", HWDiv & HWDivThumb)
   .Case("hwdiv-arm", HWDiv & HWDivARM)
+  .Case("mve", hasMVE())
   .Default(false);
 }
 
@@ -713,6 +731,10 @@
 "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
   }
 
+  if (hasMVE()) {
+Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1");
+  }
+
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
   Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 
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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Oliver Stannard (Linaro) via Phabricator via cfe-commits 
ostannard added inline comments.



Comment at: clang/lib/Basic/Targets/ARM.cpp:465
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }

SjoerdMeijer wrote:
> ostannard wrote:
> > Does this also need to set FPU and HasLegalHalfType?
> Yep, thanks for catching this one, will fix this.
What about FPU? mve.fp requires that the FPU is also enabled, so we should also 
get the ##__ARM_FPV5__## macro (unless we're adding a new one for the v8.1M 
FPU?).


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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Sjoerd Meijer via Phabricator via cfe-commits 
SjoerdMeijer updated this revision to Diff 203522.
SjoerdMeijer added a comment.

Set FullFP16 for +mve.fp


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Files:
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/ARM.h
  clang/test/Preprocessor/arm-target-features.c

Index: clang/test/Preprocessor/arm-target-features.c
===
--- clang/test/Preprocessor/arm-target-features.c
+++ clang/test/Preprocessor/arm-target-features.c
@@ -748,6 +748,26 @@
 // KRAIT-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1
 // KRAIT-ALLOW-FP-INSTR:#define  __ARM_VFPV4__ 1
 
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M %s
+// CHECK-V81M: #define __ARM_ARCH 8
+// CHECK-V81M: #define __ARM_ARCH_8_1M_MAIN__ 1
+// CHECK-V81M: #define __ARM_ARCH_ISA_THUMB 2
+// CHECK-V81M: #define __ARM_ARCH_PROFILE 'M'
+// CHECK-V81M-NOT: #define __ARM_FEATURE_DSP
+// CHECK-V81M-NOT: #define __ARM_FEATURE_MVE
+// CHECK-V81M-NOT: #define __ARM_FEATURE_SIMD32
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE %s
+// CHECK-V81M-MVE: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_MVE 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_SIMD32 1
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE-FP %s
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_FP16_SCALAR_ARITHMETIC 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_MVE 3
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_SIMD32 1
+
 // RUN: %clang -target armv8.1a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81A %s
 // CHECK-V81A: #define __ARM_ARCH 8
 // CHECK-V81A: #define __ARM_ARCH_8_1A__ 1
Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -33,6 +33,11 @@
 FPARMV8 = (1 << 4)
   };
 
+  enum MVEMode {
+  MVE_INT = (1 << 0),
+  MVE_FP  = (1 << 1)
+  };
+
   // Possible HWDiv features.
   enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
 
@@ -56,6 +61,7 @@
   unsigned ArchVersion;
 
   unsigned FPU : 5;
+  unsigned MVE : 2;
 
   unsigned IsAAPCS : 1;
   unsigned HWDiv : 2;
@@ -100,6 +106,8 @@
   bool isThumb() const;
   bool supportsThumb() const;
   bool supportsThumb2() const;
+  bool hasMVE() const;
+  bool hasMVEFloat() const;
 
   StringRef getCPUAttr() const;
   StringRef getCPUProfile() const;
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -146,6 +146,14 @@
   }
 }
 
+bool ARMTargetInfo::hasMVE() const {
+  return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0;
+}
+
+bool ARMTargetInfo::hasMVEFloat() const {
+  return hasMVE() && (MVE & MVE_FP);
+}
+
 bool ARMTargetInfo::isThumb() const {
   return ArchISA == llvm::ARM::ISAKind::THUMB;
 }
@@ -448,6 +456,14 @@
   HasLegalHalfType = true;
 } else if (Feature == "+dotprod") {
   DotProd = true;
+} else if (Feature == "+mve") {
+  DSP = 1;
+  MVE |= MVE_INT;
+} else if (Feature == "+mve.fp") {
+  DSP = 1;
+  HasLegalHalfType = true;
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }
   }
 
@@ -498,6 +514,7 @@
   .Case("vfp", FPU && !SoftFloat)
   .Case("hwdiv", HWDiv & HWDivThumb)
   .Case("hwdiv-arm", HWDiv & HWDivARM)
+  .Case("mve", hasMVE())
   .Default(false);
 }
 
@@ -713,6 +730,10 @@
 "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
   }
 
+  if (hasMVE()) {
+Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1");
+  }
+
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
   Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 
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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Sjoerd Meijer via Phabricator via cfe-commits 
SjoerdMeijer marked an inline comment as done.
SjoerdMeijer added inline comments.



Comment at: clang/lib/Basic/Targets/ARM.cpp:465
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }

ostannard wrote:
> Does this also need to set FPU and HasLegalHalfType?
Yep, thanks for catching this one, will fix this.


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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Oliver Stannard (Linaro) via Phabricator via cfe-commits 
ostannard added inline comments.



Comment at: clang/lib/Basic/Targets/ARM.cpp:465
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }

Does this also need to set FPU and HasLegalHalfType?


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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-06-07 Thread Sjoerd Meijer via Phabricator via cfe-commits 
SjoerdMeijer updated this revision to Diff 203507.
SjoerdMeijer added a comment.

Added tests


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Files:
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/ARM.h
  clang/test/Preprocessor/arm-target-features.c

Index: clang/test/Preprocessor/arm-target-features.c
===
--- clang/test/Preprocessor/arm-target-features.c
+++ clang/test/Preprocessor/arm-target-features.c
@@ -748,6 +748,25 @@
 // KRAIT-ALLOW-FP-INSTR:#define __ARM_FEATURE_DSP 1
 // KRAIT-ALLOW-FP-INSTR:#define  __ARM_VFPV4__ 1
 
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M %s
+// CHECK-V81M: #define __ARM_ARCH 8
+// CHECK-V81M: #define __ARM_ARCH_8_1M_MAIN__ 1
+// CHECK-V81M: #define __ARM_ARCH_ISA_THUMB 2
+// CHECK-V81M: #define __ARM_ARCH_PROFILE 'M'
+// CHECK-V81M-NOT: #define __ARM_FEATURE_DSP
+// CHECK-V81M-NOT: #define __ARM_FEATURE_MVE
+// CHECK-V81M-NOT: #define __ARM_FEATURE_SIMD32
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE %s
+// CHECK-V81M-MVE: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_MVE 1
+// CHECK-V81M-MVE: #define __ARM_FEATURE_SIMD32 1
+
+// RUN: %clang -target arm-arm-none-eabi -march=armv8.1-m.main+mve.fp -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81M-MVE-FP %s
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_DSP 1
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_MVE 3
+// CHECK-V81M-MVE-FP: #define __ARM_FEATURE_SIMD32 1
+
 // RUN: %clang -target armv8.1a-none-none-eabi -x c -E -dM %s -o - | FileCheck -match-full-lines --check-prefix=CHECK-V81A %s
 // CHECK-V81A: #define __ARM_ARCH 8
 // CHECK-V81A: #define __ARM_ARCH_8_1A__ 1
Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -33,6 +33,11 @@
 FPARMV8 = (1 << 4)
   };
 
+  enum MVEMode {
+  MVE_INT = (1 << 0),
+  MVE_FP  = (1 << 1)
+  };
+
   // Possible HWDiv features.
   enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
 
@@ -56,6 +61,7 @@
   unsigned ArchVersion;
 
   unsigned FPU : 5;
+  unsigned MVE : 2;
 
   unsigned IsAAPCS : 1;
   unsigned HWDiv : 2;
@@ -100,6 +106,8 @@
   bool isThumb() const;
   bool supportsThumb() const;
   bool supportsThumb2() const;
+  bool hasMVE() const;
+  bool hasMVEFloat() const;
 
   StringRef getCPUAttr() const;
   StringRef getCPUProfile() const;
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -146,6 +146,14 @@
   }
 }
 
+bool ARMTargetInfo::hasMVE() const {
+  return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0;
+}
+
+bool ARMTargetInfo::hasMVEFloat() const {
+  return hasMVE() && (MVE & MVE_FP);
+}
+
 bool ARMTargetInfo::isThumb() const {
   return ArchISA == llvm::ARM::ISAKind::THUMB;
 }
@@ -448,6 +456,13 @@
   HasLegalHalfType = true;
 } else if (Feature == "+dotprod") {
   DotProd = true;
+} else if (Feature == "+mve") {
+  DSP = 1;
+  MVE |= MVE_INT;
+} else if (Feature == "+mve.fp") {
+  DSP = 1;
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }
   }
 
@@ -498,6 +513,7 @@
   .Case("vfp", FPU && !SoftFloat)
   .Case("hwdiv", HWDiv & HWDivThumb)
   .Case("hwdiv-arm", HWDiv & HWDivARM)
+  .Case("mve", hasMVE())
   .Default(false);
 }
 
@@ -713,6 +729,10 @@
 "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
   }
 
+  if (hasMVE()) {
+Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1");
+  }
+
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
   Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 
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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-04-15 Thread Tim Northover via Phabricator via cfe-commits 
t.p.northover added a comment.

Could you add some tests?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D60710/new/

https://reviews.llvm.org/D60710



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[PATCH] D60710: [ARM] Add ACLE feature macros for MVE.

2019-04-15 Thread Simon Tatham via Phabricator via cfe-commits 
simon_tatham created this revision.
simon_tatham added reviewers: dmgreen, samparker, SjoerdMeijer.
Herald added subscribers: cfe-commits, kristof.beyls, javed.absar.
Herald added a project: clang.

If MVE is present at all, then the macro __ARM_FEATURE_MVE is defined
to a value which has bit 0 set for integer MVE, and bit 1 set for
floating-point MVE.

(Floating-point MVE implies integer MVE, so if this macro is defined
at all then it will be set to 1 or 3, never 2.)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D60710

Files:
  clang/lib/Basic/Targets/ARM.cpp
  clang/lib/Basic/Targets/ARM.h


Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -33,6 +33,11 @@
 FPARMV8 = (1 << 4)
   };
 
+  enum MVEMode {
+  MVE_INT = (1 << 0),
+  MVE_FP  = (1 << 1)
+  };
+
   // Possible HWDiv features.
   enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
 
@@ -56,6 +61,7 @@
   unsigned ArchVersion;
 
   unsigned FPU : 5;
+  unsigned MVE : 2;
 
   unsigned IsAAPCS : 1;
   unsigned HWDiv : 2;
@@ -100,6 +106,8 @@
   bool isThumb() const;
   bool supportsThumb() const;
   bool supportsThumb2() const;
+  bool hasMVE() const;
+  bool hasMVEFloat() const;
 
   StringRef getCPUAttr() const;
   StringRef getCPUProfile() const;
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -146,6 +146,14 @@
   }
 }
 
+bool ARMTargetInfo::hasMVE() const {
+  return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0;
+}
+
+bool ARMTargetInfo::hasMVEFloat() const {
+  return hasMVE() && (MVE & MVE_FP);
+}
+
 bool ARMTargetInfo::isThumb() const {
   return ArchISA == llvm::ARM::ISAKind::THUMB;
 }
@@ -443,6 +451,13 @@
   HasLegalHalfType = true;
 } else if (Feature == "+dotprod") {
   DotProd = true;
+} else if (Feature == "+mve") {
+  DSP = 1;
+  MVE |= MVE_INT;
+} else if (Feature == "+mve.fp") {
+  DSP = 1;
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }
   }
 
@@ -493,6 +508,7 @@
   .Case("vfp", FPU && !SoftFloat)
   .Case("hwdiv", HWDiv & HWDivThumb)
   .Case("hwdiv-arm", HWDiv & HWDivARM)
+  .Case("mve", hasMVE())
   .Default(false);
 }
 
@@ -708,6 +724,10 @@
 "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
   }
 
+  if (hasMVE()) {
+Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1");
+  }
+
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
   Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 


Index: clang/lib/Basic/Targets/ARM.h
===
--- clang/lib/Basic/Targets/ARM.h
+++ clang/lib/Basic/Targets/ARM.h
@@ -33,6 +33,11 @@
 FPARMV8 = (1 << 4)
   };
 
+  enum MVEMode {
+  MVE_INT = (1 << 0),
+  MVE_FP  = (1 << 1)
+  };
+
   // Possible HWDiv features.
   enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) };
 
@@ -56,6 +61,7 @@
   unsigned ArchVersion;
 
   unsigned FPU : 5;
+  unsigned MVE : 2;
 
   unsigned IsAAPCS : 1;
   unsigned HWDiv : 2;
@@ -100,6 +106,8 @@
   bool isThumb() const;
   bool supportsThumb() const;
   bool supportsThumb2() const;
+  bool hasMVE() const;
+  bool hasMVEFloat() const;
 
   StringRef getCPUAttr() const;
   StringRef getCPUProfile() const;
Index: clang/lib/Basic/Targets/ARM.cpp
===
--- clang/lib/Basic/Targets/ARM.cpp
+++ clang/lib/Basic/Targets/ARM.cpp
@@ -146,6 +146,14 @@
   }
 }
 
+bool ARMTargetInfo::hasMVE() const {
+  return ArchKind == llvm::ARM::ArchKind::ARMV8_1MMainline && MVE != 0;
+}
+
+bool ARMTargetInfo::hasMVEFloat() const {
+  return hasMVE() && (MVE & MVE_FP);
+}
+
 bool ARMTargetInfo::isThumb() const {
   return ArchISA == llvm::ARM::ISAKind::THUMB;
 }
@@ -443,6 +451,13 @@
   HasLegalHalfType = true;
 } else if (Feature == "+dotprod") {
   DotProd = true;
+} else if (Feature == "+mve") {
+  DSP = 1;
+  MVE |= MVE_INT;
+} else if (Feature == "+mve.fp") {
+  DSP = 1;
+  MVE |= MVE_INT | MVE_FP;
+  HW_FP |= HW_FP_SP | HW_FP_HP;
 }
   }
 
@@ -493,6 +508,7 @@
   .Case("vfp", FPU && !SoftFloat)
   .Case("hwdiv", HWDiv & HWDivThumb)
   .Case("hwdiv-arm", HWDiv & HWDivARM)
+  .Case("mve", hasMVE())
   .Default(false);
 }
 
@@ -708,6 +724,10 @@
 "0x" + Twine::utohexstr(HW_FP & ~HW_FP_DP));
   }
 
+  if (hasMVE()) {
+Builder.defineMacro("__ARM_FEATURE_MVE", hasMVEFloat() ? "3" : "1");
+  }
+
   Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
   Twine(Opts.WCharSize ? Opts.WCharSize : 4));
 
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