[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-19 Thread Jason Liu via Phabricator via cfe-commits
This revision was automatically updated to reflect the committed changes.
Closed by commit rG7f5d91d3ffed: [clang][AIX] Implement ABIInfo and 
TargetCodeGenInfo for AIX (authored by jasonliu).

Changed prior to commit:
  https://reviews.llvm.org/D79035?vs=263864=264922#toc

Repository:
  rG LLVM Github Monorepo

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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Frontend/aix-unsupported.c

Index: clang/test/Frontend/aix-unsupported.c
===
--- /dev/null
+++ clang/test/Frontend/aix-unsupported.c
@@ -0,0 +1,10 @@
+// REQUIRES: powerpc-registered-target
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-dwarf.c
===
--- /dev/null
+++ clang/test/CodeGen/ppc32-dwarf.c
@@ -0,0 +1,126 @@
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];
+
+int test() {
+  __builtin_init_dwarf_reg_size_table(dwarf_reg_size_table);
+
+  return __builtin_dwarf_sp_column();
+}
+
+// CHECK-LABEL: define i32 @test()
+// CHECK: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 0), align 1
+// CHECK-NEXT:store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i32 0, i32 1), align 1
+// CHECK-NEXT: 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-14 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L accepted this revision.
Xiangling_L added a comment.
This revision is now accepted and ready to land.

LGTM with a minor comment:
You may want to add a `TODO` or `FIXME` at `clang/lib/CodeGen/TargetInfo.cpp: 
4496` and `clang/lib/CodeGen/TargetInfo.cpp:4418` like:

  //FIXME:
  Correct the aggregate type alignment when it contains a double/long double as 
its first member.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-14 Thread Zarko Todorovski via Phabricator via cfe-commits
ZarkoCA added a comment.

I'm ok with this now. I will let @Xiangling_L approve if she's ok with it since 
she had the last few comments.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-13 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 263864.
jasonliu added a comment.

Remove driver's error.


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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Frontend/aix-unsupported.c

Index: clang/test/Frontend/aix-unsupported.c
===
--- /dev/null
+++ clang/test/Frontend/aix-unsupported.c
@@ -0,0 +1,10 @@
+// REQUIRES: powerpc-registered-target
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-13 Thread Jason Liu via Phabricator via cfe-commits
jasonliu marked an inline comment as done.
jasonliu added inline comments.



Comment at: clang/test/Frontend/aix-unsupported.c:10
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option

Xiangling_L wrote:
> One thing I am not so sure about is that for these two options 
> `-maix-struct-return`,  `-msvr4-struct-return`, do we need to update the 
> `ClangCommandLineReference.rst` since we emit diags `unsupported option 
> '-maix-struct-return' for target 'powerpc-unknown-aix'`
I think the error message is clear enough in itself what user should expect. I 
don't think it's necessary to add to the doc.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-13 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/Frontend/CompilerInvocation.cpp:1300
   OPT_maix_struct_return, OPT_msvr4_struct_return)) {
+// TODO: We might want to consider enabling these options on AIX in the
+// future.

Since we disable them in FE, should we remove the one in driver?



Comment at: clang/test/Frontend/aix-unsupported.c:10
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option

One thing I am not so sure about is that for these two options 
`-maix-struct-return`,  `-msvr4-struct-return`, do we need to update the 
`ClangCommandLineReference.rst` since we emit diags `unsupported option 
'-maix-struct-return' for target 'powerpc-unknown-aix'`


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-12 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 263502.
jasonliu added a comment.

Add error report in clang_cc1 for unsupported option on AIX.


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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/lib/Frontend/CompilerInvocation.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c
  clang/test/Frontend/aix-unsupported.c

Index: clang/test/Frontend/aix-unsupported.c
===
--- /dev/null
+++ clang/test/Frontend/aix-unsupported.c
@@ -0,0 +1,10 @@
+// REQUIRES: powerpc-registered-target
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// CHECK: unsupported option
Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-12 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4684
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

jasonliu wrote:
> Xiangling_L wrote:
> > I noticed that in patch https://reviews.llvm.org/D76360, Zarko added a 
> > check to emit an error for using this option within cc1. But in your patch, 
> > this option only emit error when invoked by the driver. Does that mean we 
> > are pretty sure this option is doing what we want on AIX?
> Are you able to set this CodeGen option when it is disabled in the 
> Frontend/CompilerInvocation.cpp?
I would say if you disable it in this function 
`PPC32TargetCodeGenInfo::isStructReturnInRegABI`, neither driver and FE can 
invoke it. However, in your patch, the option is disabled only in the driver, 
that means you can still invoke it with clang_cc1.



Comment at: clang/test/CodeGen/aix-vector.c:11
+}
+

Please remove the extra blank line


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Jason Liu via Phabricator via cfe-commits
jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:1547
 
   // Otherwise, if the type contains an SSE vector type, the alignment is 16.
+  if (Align >= 16 && (isSIMDVectorType(getContext(), Ty) ||

Xiangling_L wrote:
> Also update the comment?
I think the comment is fine. It's still SSE vector type even if we changed the 
query to SIMD. SSE is for x86 and altivec is for Power, but they are both SIMD 
vectors.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4684
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

Xiangling_L wrote:
> I noticed that in patch https://reviews.llvm.org/D76360, Zarko added a check 
> to emit an error for using this option within cc1. But in your patch, this 
> option only emit error when invoked by the driver. Does that mean we are 
> pretty sure this option is doing what we want on AIX?
Are you able to set this CodeGen option when it is disabled in the 
Frontend/CompilerInvocation.cpp?


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 262964.
jasonliu marked 5 inline comments as done.
jasonliu added a comment.

Address Xiangling's comment.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 262958.
jasonliu marked 2 inline comments as done.
jasonliu added a comment.

Address Zarko's comment.


CHANGES SINCE LAST ACTION
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https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:1547
 
   // Otherwise, if the type contains an SSE vector type, the alignment is 16.
+  if (Align >= 16 && (isSIMDVectorType(getContext(), Ty) ||

Also update the comment?



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4365
+
+  Ty = useFirstFieldIfTransparentUnion(Ty);
+

As in doc says [[ 
https://www.ibm.com/support/knowledgecenter/SSGH2K_13.1.0/com.ibm.xlc131.aix.doc/language_ref/type_attr_transp_union.html
 | The transparent_union type attribute ]]:
 `float _Complex, double _Complex or vector types can be members of a 
transparent union, but they cannot be the first member. `  That means the first 
field still could be something like Integral Complex etc., which falls into the 
category `isAnyComplexType`.

So I guess `Ty = useFirstFieldIfTransparentUnion(Ty);` should be at the first 
line.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4374
+CharUnits ABIAlign = getParamTypeAlignment(Ty);
+CharUnits TyAlign = getContext().getTypeAlignInChars(Ty);
+

If we want to be consistent with other part of alignment implementation, 
`getContext().getTypeAlignInChars(Ty)` gives `ABIAlign`. I would suggest we 
name `ABIAlign` here to something like `CCAlign` or `ArgumentAlign`.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4684
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

I noticed that in patch https://reviews.llvm.org/D76360, Zarko added a check to 
emit an error for using this option within cc1. But in your patch, this option 
only emit error when invoked by the driver. Does that mean we are pretty sure 
this option is doing what we want on AIX?


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Zarko Todorovski via Phabricator via cfe-commits
ZarkoCA added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:5244
 llvm::Value *Address) const {
-
-  return PPC64_initDwarfEHRegSizeTable(CGF, Address);
+  return PPC_initDwarfEHRegSizeTable(CGF, Address, /* Is64Bit*/ true,
+ /*IsAIX*/ false);

Missed to point out the extra space in `/* Is64Bit*/` previously. 



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4541
options::OPT_msvr4_struct_return)) {
-if (TC.getArch() != llvm::Triple::ppc) {
+// TODO: We might want to consider enable these two options on AIX in the
+// future.

s/enable/enabling/


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 262878.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-08 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 262869.
jasonliu added a comment.

Address comments.
Add in over aligned structure and structure containing vector type handling for 
argument on AIX.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79035/new/

https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-07 Thread Zarko Todorovski via Phabricator via cfe-commits
ZarkoCA added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4257
+  // 64-bit only registers:
+  // 114: tfhar
+  // 115: tfiar

From what I've seen, the tfhar, tfiar and texasr are used by the Power8 CPU, 
which means that there is potential for them to be used on 64BIT AIX.  I don't 
have access to a Power8 AIX machine to test and confirm this however.  If no 
one else can confirm, maybe it's good to leave a TODO here to check?



Comment at: clang/lib/Driver/ToolChains/Clang.cpp:4541
options::OPT_msvr4_struct_return)) {
-if (TC.getArch() != llvm::Triple::ppc) {
+if (TC.getArch() != llvm::Triple::ppc || TC.getTriple().isOSAIX()) {
   D.Diag(diag::err_drv_unsupported_opt_for_target)

-maix-struct-return behaves as expected on AIX (ie. it has no change from 
default behaviour) but I agree, to me it makes disable both if we are not sure 
about one of them.  However, I think it would be good to add a TODO to enable 
this once it's verified on AIX.  



Comment at: clang/test/CodeGen/ppc32-and-aix-struct-return.c:55
+// CHECK-AIX-LABEL: define void @ret0(%struct.Zero* noalias sret {{[^,]*}})
+// CHECK-SVR4-LABEL: define void @ret0()
+Zero ret0(void) { return (Zero){}; }

sorry, is it possible to lineup the `define ..` with the line below, for the 
entire testcase?


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Jason Liu via Phabricator via cfe-commits
jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4368
+
+  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false, TypeInfo,
+  SlotSize, /*AllowHigher*/ true);

ZarkoCA wrote:
> Is there a reason why Indirect is set to `false` instead of querying for it 
> using `classifyArgumentType(Ty).isIndirect()`?
For how we handle Vaarg in backend, we just expect everything on register(no 
ByVal) even when it's a structure. So the indirect should always be false 
unless there is change in backend implementation.  



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4641
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

ZarkoCA wrote:
> Has this option been verified to work correctly on AIX? In 
> https://reviews.llvm.org/D76360 we added a defensive error because we weren't 
> sure whether padding was handled correctly as described in the code. 
Thanks. I think we should disable this option in this patch.



Comment at: clang/test/CodeGen/ppc32-and-aix-struct-return.c:8
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc-unknown-linux \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX

Xiangling_L wrote:
> Do you mean to check AIX or SVR4?
This file is actually from llvm-project/clang/test/CodeGen/ppc32-struct-return.c
What I did is only adding the check for AIX triple. And apparently, the default 
behavior of powerpc-unknown-linux triple is CHECK-AIX.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 262252.

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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-openbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Jason Liu via Phabricator via cfe-commits
jasonliu updated this revision to Diff 262250.
jasonliu marked 12 inline comments as done.
jasonliu added a comment.

Rebase and address comments.


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Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/lib/Driver/ToolChains/Clang.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc32-struct-return.c
  clang/test/CodeGen/ppc64-dwarf.c
  clang/test/Driver/ppc-unsupported.c

Index: clang/test/Driver/ppc-unsupported.c
===
--- clang/test/Driver/ppc-unsupported.c
+++ clang/test/Driver/ppc-unsupported.c
@@ -7,4 +7,12 @@
 // RUN:   -c %s 2>&1 | FileCheck %s
 // RUN: not %clang -target powerpc64le-unknown-linux -msvr4-struct-return \
 // RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -maix-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
+// RUN: not %clang -target powerpc64-unknown-aix -msvr4-struct-return \
+// RUN:   -c %s 2>&1 | FileCheck %s
 // CHECK: unsupported option
Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-struct-return.c
===
--- clang/test/CodeGen/ppc32-struct-return.c
+++ /dev/null
@@ -1,88 +0,0 @@
-// REQUIRES: powerpc-registered-target
-// RUN: %clang_cc1 -triple powerpc-unknown-freebsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-linux \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -maix-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
-// RUN: %clang_cc1 -triple powerpc-unknown-linux -msvr4-struct-return \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 -triple powerpc-unknown-netbsd \
-// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-SVR4
-// RUN: %clang_cc1 

[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

Xiangling_L wrote:
> jasonliu wrote:
> > Xiangling_L wrote:
> > > This method uses the ABI alignment of the given aggregate type which I 
> > > think is not ideal due to our AIX special alignment rule. We need to use 
> > > preferred alignment in this case.
> > > Btw also I think it's not necessary for you to rebase your patch on the 
> > > power alignment patch, I can refresh the testcase when I am dealing with 
> > > that one.
> > As it is right now in master, there is no difference between natural 
> > alignment and preferred alignment for AIX. The tentative direction is to 
> > use preferred alignment to record the actual alignment on AIX, but it is 
> > not finalized yet. I would rather leave this part of the work for the patch 
> > that's going to implement the power alignment rule for AIX.
> `getNaturalAlignIndirect` uses ABI align which is for sure not correct on AIX 
> target for Aggregate types. What we want is the actual alignment here.
> 
> So I am not sure if we want to take `getNaturalAlignIndirect` for granted 
> even if we know it's not correct semantically.
Comment update:
For the power alignment patch, after some investigation, to test IR alignment 
value for struct as argument and return type, it should base on this ABI patch. 

So I agree that we can rely on power alignment patch later to update this part.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

jasonliu wrote:
> Xiangling_L wrote:
> > This method uses the ABI alignment of the given aggregate type which I 
> > think is not ideal due to our AIX special alignment rule. We need to use 
> > preferred alignment in this case.
> > Btw also I think it's not necessary for you to rebase your patch on the 
> > power alignment patch, I can refresh the testcase when I am dealing with 
> > that one.
> As it is right now in master, there is no difference between natural 
> alignment and preferred alignment for AIX. The tentative direction is to use 
> preferred alignment to record the actual alignment on AIX, but it is not 
> finalized yet. I would rather leave this part of the work for the patch 
> that's going to implement the power alignment rule for AIX.
`getNaturalAlignIndirect` uses ABI align which is for sure not correct on AIX 
target for Aggregate types. What we want is the actual alignment here.

So I am not sure if we want to take `getNaturalAlignIndirect` for granted even 
if we know it's not correct semantically.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-05 Thread Zarko Todorovski via Phabricator via cfe-commits
ZarkoCA added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4368
+
+  return emitVoidPtrVAArg(CGF, VAListAddr, Ty, /*Indirect*/ false, TypeInfo,
+  SlotSize, /*AllowHigher*/ true);

Is there a reason why Indirect is set to `false` instead of querying for it 
using `classifyArgumentType(Ty).isIndirect()`?



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4641
 return false;
   case CodeGenOptions::SRCK_InRegs: // -msvr4-struct-return
 return true;

Has this option been verified to work correctly on AIX? In 
https://reviews.llvm.org/D76360 we added a defensive error because we weren't 
sure whether padding was handled correctly as described in the code. 



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4654
 llvm::Value *Address) const {
-  // This is calculated from the LLVM and GCC tables and verified
-  // against gcc output.  AFAIK all ABIs use the same encoding.
-
-  CodeGen::CGBuilderTy  = CGF.Builder;
-
-  llvm::IntegerType *i8 = CGF.Int8Ty;
-  llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
-  llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
-  llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
-
-  // 0-31: r0-31, the 4-byte general-purpose registers
-  AssignToArrayRange(Builder, Address, Four8, 0, 31);
-
-  // 32-63: fp0-31, the 8-byte floating-point registers
-  AssignToArrayRange(Builder, Address, Eight8, 32, 63);
-
-  // 64-76 are various 4-byte special-purpose registers:
-  // 64: mq
-  // 65: lr
-  // 66: ctr
-  // 67: ap
-  // 68-75 cr0-7
-  // 76: xer
-  AssignToArrayRange(Builder, Address, Four8, 64, 76);
-
-  // 77-108: v0-31, the 16-byte vector registers
-  AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
-
-  // 109: vrsave
-  // 110: vscr
-  // 111: spe_acc
-  // 112: spefscr
-  // 113: sfp
-  AssignToArrayRange(Builder, Address, Four8, 109, 113);
-
-  return false;
+  return PPC_initDwarfEHRegSizeTable(CGF, Address, /* Is64Bit*/ false,
+ /*IsAIX*/ false);

Should be changed to `/*Is64BIT*/`? Or you can add spaces to`/*IsAIX*/` so that 
it's consistent.  



Comment at: clang/lib/CodeGen/TargetInfo.cpp:5195
+  return PPC_initDwarfEHRegSizeTable(CGF, Address, /* Is64Bit*/ true,
+ /*IsAIX*/ false);
 }

Remove extra space from `/* Is64Bit*/`



Comment at: clang/lib/CodeGen/TargetInfo.cpp:10454
+if (Triple.isOSAIX())
+  return SetCGInfo(new AIXTargetCodeGenInfo(Types, /* Is64Bit */ false));
+

same as above about removing extra spaces. 



Comment at: clang/lib/CodeGen/TargetInfo.cpp:10465
+if (Triple.isOSAIX())
+  return SetCGInfo(new AIXTargetCodeGenInfo(Types, /* Is64Bit */ true));
+

spaces



Comment at: clang/test/CodeGen/aix-return.c:3
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefixes=AIX-COM,AIX32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \

I think it would be simpler to just use `AIX` instead of `AIX-COM`.  



Comment at: clang/test/CodeGen/aix-struct-arg.c:3
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \

Same here, I think it be simpler to use either `CHECK` or `AIX`.  My preference 
is to use `CHECK` since other targets aren't being tested here but I would 
leave it up to you. 



Comment at: clang/test/CodeGen/aix-vaargs.c:3
+// REQUIRES: asserts
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | FileCheck 
%s --check-prefixes=AIX-COM,AIX-M32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | 
FileCheck %s --check-prefixes=AIX-COM,AIX-M64

jasonliu wrote:
> Xiangling_L wrote:
> > Consistent with other testcases to use `AIX32/AIX64`?
> I chose AIX-M32/AIX-M64 mainly because the length is the same as AIX-COM so 
> we don't need to worry about aligning the space. I would prefer to keep it 
> that.
I agree with Xiangling, it would be better to be consistent with the other 
testcases.  To get things to line up properly you can use `AIX32/AIX64` and 
`CHECK` instead of `AIX-COM`.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-04 Thread Jason Liu via Phabricator via cfe-commits
jasonliu marked 2 inline comments as done.
jasonliu added inline comments.



Comment at: clang/test/CodeGen/ppc32-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck 
%s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];

Xiangling_L wrote:
> Minor comment:
> Would `PPC32SVR4` compared to `PPC32` make the checking content clearer since 
> PPC32 actually includes AIX target?
Technically, it's PPC32 target except AIX (not restrict to SVR4). So PPC32SVR4 
is not that accurate either. 



Comment at: clang/test/CodeGen/ppc64-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | 
FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];

Xiangling_L wrote:
> Same comment as above.
> s/PPC64/PPC64SVR4?
Same above, and for PPC64 we have Darwin that's actually not SVR4.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-04 Thread Jason Liu via Phabricator via cfe-commits
jasonliu marked 2 inline comments as done.
jasonliu added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

Xiangling_L wrote:
> This method uses the ABI alignment of the given aggregate type which I think 
> is not ideal due to our AIX special alignment rule. We need to use preferred 
> alignment in this case.
> Btw also I think it's not necessary for you to rebase your patch on the power 
> alignment patch, I can refresh the testcase when I am dealing with that one.
As it is right now in master, there is no difference between natural alignment 
and preferred alignment for AIX. The tentative direction is to use preferred 
alignment to record the actual alignment on AIX, but it is not finalized yet. I 
would rather leave this part of the work for the patch that's going to 
implement the power alignment rule for AIX.



Comment at: clang/test/CodeGen/aix-vaargs.c:3
+// REQUIRES: asserts
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | FileCheck 
%s --check-prefixes=AIX-COM,AIX-M32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | 
FileCheck %s --check-prefixes=AIX-COM,AIX-M64

Xiangling_L wrote:
> Consistent with other testcases to use `AIX32/AIX64`?
I chose AIX-M32/AIX-M64 mainly because the length is the same as AIX-COM so we 
don't need to worry about aligning the space. I would prefer to keep it that.


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-05-04 Thread Xiangling Liao via Phabricator via cfe-commits
Xiangling_L added inline comments.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4179
+  // This is calculated from the LLVM and GCC tables and verified
+  // against gcc output.  AFAIK all ABIs use the same encoding.
+

Minor comment about comment style:
Though I noticed that "AFAIK all ABIs use the same encoding." is from original 
code, could we adjust it to something like "All PPC ABIs use the same encoding."



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4194
+
+  // 64-76 are various 4-byte or 8-byte special-purpose registers:
+  // 64: mq

s/64-76/64-67?



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4317
+  if (isAggregateTypeForABI(RetTy))
+return getNaturalAlignIndirect(RetTy);
+

This method uses the ABI alignment of the given aggregate type which I think is 
not ideal due to our AIX special alignment rule. We need to use preferred 
alignment in this case.
Btw also I think it's not necessary for you to rebase your patch on the power 
alignment patch, I can refresh the testcase when I am dealing with that one.



Comment at: clang/lib/CodeGen/TargetInfo.cpp:4336
+if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
+  return getNaturalAlignIndirect(Ty, RAA == CGCXXABI::RAA_DirectInMemory);
+

Same comment like above.



Comment at: clang/test/CodeGen/aix-vaargs.c:3
+// REQUIRES: asserts
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm -o - %s | FileCheck 
%s --check-prefixes=AIX-COM,AIX-M32
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm -o - %s | 
FileCheck %s --check-prefixes=AIX-COM,AIX-M64

Consistent with other testcases to use `AIX32/AIX64`?



Comment at: clang/test/CodeGen/ppc32-and-aix-struct-return.c:8
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX
+// RUN: %clang_cc1 -triple powerpc-unknown-linux \
+// RUN:   -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-AIX

Do you mean to check AIX or SVR4?



Comment at: clang/test/CodeGen/ppc32-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck 
%s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];

Minor comment:
Would `PPC32SVR4` compared to `PPC32` make the checking content clearer since 
PPC32 actually includes AIX target?



Comment at: clang/test/CodeGen/ppc64-dwarf.c:2
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | 
FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | 
FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];

Same comment as above.
s/PPC64/PPC64SVR4?


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[PATCH] D79035: [clang][AIX] Implement ABIInfo and TargetCodeGenInfo for AIX

2020-04-28 Thread Jason Liu via Phabricator via cfe-commits
jasonliu created this revision.
jasonliu added reviewers: Xiangling_L, sfertile, hubert.reinterpretcast, 
cebowleratibm, ZarkoCA.
Herald added subscribers: kbarton, nemanjai.
Herald added a project: clang.

Created AIXABIInfo and AIXTargetCodeGenInfo for AIX ABI.

Some investigation and FAQ on why we created AIXABIInfo:

Use or derive PPC32/PPC64 ABIInfo for AIX: 
There are a lot of subtle differences between PPC32 and PPC64 variation. For 
AIX we do not have a huge differences between 32 bit and 64 bit for the ABI 
rules. Which means if we decide to use PPC32 for 32 bit on AIX and PPC64 for 64 
bit on AIX, we will need to add in a lot of target check to make them 
symmetric. The code flow will be really hard to follow and verify for every 
target that is trying to use them. And it’s easy for us to take a lot of 
unwanted change that really is meant for SVR targets. 
Use one ABIInfo class for both 32 bit and 64 bit on AIX will make the code much 
clear and easier to follow through. And that was one of the reason for us to 
create LowerCall_AIX/LowerFormalArgument_AIX instead of just rename and use the 
existing SVR4/Darwin one.

Derive from DefaultABIInfo:
We are going to override most of the methods in DefaultABIInfo anyway if we 
look at the analysis below.

Derive from SwiftABIInfo:
I don't think we want to claim Swift support on AIX right now.


Repository:
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https://reviews.llvm.org/D79035

Files:
  clang/lib/CodeGen/TargetInfo.cpp
  clang/test/CodeGen/aix-complex.c
  clang/test/CodeGen/aix-return.c
  clang/test/CodeGen/aix-struct-arg.c
  clang/test/CodeGen/aix-vaargs.c
  clang/test/CodeGen/aix-vector.c
  clang/test/CodeGen/ppc32-and-aix-struct-return.c
  clang/test/CodeGen/ppc32-dwarf.c
  clang/test/CodeGen/ppc64-dwarf.c

Index: clang/test/CodeGen/ppc64-dwarf.c
===
--- clang/test/CodeGen/ppc64-dwarf.c
+++ clang/test/CodeGen/ppc64-dwarf.c
@@ -1,4 +1,5 @@
-// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
 static unsigned char dwarf_reg_size_table[1024];
 
 int test() {
@@ -119,10 +120,10 @@
 // CHECK-NEXT: store i8 16, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 108), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 109), align 1
 // CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 110), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
-// CHECK-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 111), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 112), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 113), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 114), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 115), align 1
+// PPC64-NEXT: store i8 8, i8* getelementptr inbounds ([1024 x i8], [1024 x i8]* @dwarf_reg_size_table, i64 0, i64 116), align 1
 // CHECK-NEXT: ret i32 1
Index: clang/test/CodeGen/ppc32-dwarf.c
===
--- /dev/null
+++ clang/test/CodeGen/ppc32-dwarf.c
@@ -0,0 +1,126 @@
+// RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
+static unsigned char dwarf_reg_size_table[1024];
+
+int test() {
+  __builtin_init_dwarf_reg_size_table(dwarf_reg_size_table);
+
+  return __builtin_dwarf_sp_column();
+}
+
+// CHECK-LABEL: define i32 @test()
+// CHECK: store i8 4, i8* getelementptr inbounds ([1024 x i8], [1024 x