[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
Krishna-13-cyber wrote: > LGTM Thanks! https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/RKSimon closed https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/Krishna-13-cyber updated https://github.com/llvm/llvm-project/pull/89362 >From 4e649d105a2af038e6dbd0e93b457eebea2e543a Mon Sep 17 00:00:00 2001 From: Krishna-13-cyber Date: Fri, 19 Apr 2024 15:09:26 +0530 Subject: [PATCH 1/4] Add optimised LLVM IR for atomic increments/decrements on floats --- clang/lib/CodeGen/CGExprScalar.cpp| 13 + clang/test/CodeGen/X86/x86-atomic-float.c | 97 +++ .../test/CodeGen/X86/x86-atomic-long_double.c | 609 +- 3 files changed, 410 insertions(+), 309 deletions(-) create mode 100644 clang/test/CodeGen/X86/x86-atomic-float.c diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index 1f18e0d5ba409a..e97bb5c7e9dd16 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2792,6 +2792,19 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, llvm::AtomicOrdering::SequentiallyConsistent); return isPre ? Builder.CreateBinOp(op, old, amt) : old; } +// Special case for atomic increment/decrement on floats +if (type->isFloatingType()) { + llvm::AtomicRMWInst::BinOp aop = + isInc ? llvm::AtomicRMWInst::FAdd : llvm::AtomicRMWInst::FSub; + llvm::Instruction::BinaryOps op = + isInc ? llvm::Instruction::FAdd : llvm::Instruction::FSub; + llvm::Value *amt = llvm::ConstantFP::get( + VMContext, llvm::APFloat(static_cast(amount))); + llvm::Value *old = + Builder.CreateAtomicRMW(aop, LV.getAddress(CGF), amt, + llvm::AtomicOrdering::SequentiallyConsistent); + return isPre ? Builder.CreateBinOp(op, old, amt) : old; +} value = EmitLoadOfLValue(LV, E->getExprLoc()); input = value; // For every other atomic operation, we need to emit a load-op-cmpxchg loop diff --git a/clang/test/CodeGen/X86/x86-atomic-float.c b/clang/test/CodeGen/X86/x86-atomic-float.c new file mode 100644 index 00..89a2605ed44461 --- /dev/null +++ b/clang/test/CodeGen/X86/x86-atomic-float.c @@ -0,0 +1,97 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefix=CHECK32 %s + +// CHECK-LABEL: define dso_local i32 @test_int_inc( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK-NEXT:ret i32 [[TMP0]] +// +// CHECK32-LABEL: define dso_local i32 @test_int_inc( +// CHECK32-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK32-NEXT:ret i32 [[TMP0]] +// +int test_int_inc() +{ +static _Atomic int n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_inc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_inc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_inc() +{ +static _Atomic float n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_dc() +{ +static _Atomic float n; +return n--; +} + +// CHECK-LABEL: define dso_local float @test_float_pre_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK-NEXT:ret float [[TMP1]] +// +// CHECK32-LABEL: define dso_local float @test_float_pre_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK32-NEXT:
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
@@ -0,0 +1,69 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefixes=CHECK,CHECK64 %s +// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefixes=CHECK,CHECK32 %s + + +// CHECK-LABEL: define dso_local i32 @test_int_inc( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK-NEXT:ret i32 [[TMP0]] +// +int test_int_inc() +{ +static _Atomic int n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_inc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +float test_float_post_inc() +{ +static _Atomic float n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 RKSimon wrote: `fsub x, -1.0`? Should it be `fsub x, 1.0`? https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/RKSimon edited https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
Krishna-13-cyber wrote: Hi @RKSimon, any more changes required for this!? https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
@@ -0,0 +1,64 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s Krishna-13-cyber wrote: Yes I added the test, I misinterpreted the earlier review. Thanks! https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/Krishna-13-cyber updated https://github.com/llvm/llvm-project/pull/89362 >From 4e649d105a2af038e6dbd0e93b457eebea2e543a Mon Sep 17 00:00:00 2001 From: Krishna-13-cyber Date: Fri, 19 Apr 2024 15:09:26 +0530 Subject: [PATCH 1/3] Add optimised LLVM IR for atomic increments/decrements on floats --- clang/lib/CodeGen/CGExprScalar.cpp| 13 + clang/test/CodeGen/X86/x86-atomic-float.c | 97 +++ .../test/CodeGen/X86/x86-atomic-long_double.c | 609 +- 3 files changed, 410 insertions(+), 309 deletions(-) create mode 100644 clang/test/CodeGen/X86/x86-atomic-float.c diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index 1f18e0d5ba409a..e97bb5c7e9dd16 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2792,6 +2792,19 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, llvm::AtomicOrdering::SequentiallyConsistent); return isPre ? Builder.CreateBinOp(op, old, amt) : old; } +// Special case for atomic increment/decrement on floats +if (type->isFloatingType()) { + llvm::AtomicRMWInst::BinOp aop = + isInc ? llvm::AtomicRMWInst::FAdd : llvm::AtomicRMWInst::FSub; + llvm::Instruction::BinaryOps op = + isInc ? llvm::Instruction::FAdd : llvm::Instruction::FSub; + llvm::Value *amt = llvm::ConstantFP::get( + VMContext, llvm::APFloat(static_cast(amount))); + llvm::Value *old = + Builder.CreateAtomicRMW(aop, LV.getAddress(CGF), amt, + llvm::AtomicOrdering::SequentiallyConsistent); + return isPre ? Builder.CreateBinOp(op, old, amt) : old; +} value = EmitLoadOfLValue(LV, E->getExprLoc()); input = value; // For every other atomic operation, we need to emit a load-op-cmpxchg loop diff --git a/clang/test/CodeGen/X86/x86-atomic-float.c b/clang/test/CodeGen/X86/x86-atomic-float.c new file mode 100644 index 00..89a2605ed44461 --- /dev/null +++ b/clang/test/CodeGen/X86/x86-atomic-float.c @@ -0,0 +1,97 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefix=CHECK32 %s + +// CHECK-LABEL: define dso_local i32 @test_int_inc( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK-NEXT:ret i32 [[TMP0]] +// +// CHECK32-LABEL: define dso_local i32 @test_int_inc( +// CHECK32-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK32-NEXT:ret i32 [[TMP0]] +// +int test_int_inc() +{ +static _Atomic int n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_inc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_inc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_inc() +{ +static _Atomic float n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_dc() +{ +static _Atomic float n; +return n--; +} + +// CHECK-LABEL: define dso_local float @test_float_pre_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK-NEXT:ret float [[TMP1]] +// +// CHECK32-LABEL: define dso_local float @test_float_pre_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK32-NEXT:
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
@@ -0,0 +1,64 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s RKSimon wrote: Please can you add the i686 test coverage back? I mean that in most cases you should be able to share the check-prefixes https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/Krishna-13-cyber ready_for_review https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/Krishna-13-cyber updated https://github.com/llvm/llvm-project/pull/89362 >From 4e649d105a2af038e6dbd0e93b457eebea2e543a Mon Sep 17 00:00:00 2001 From: Krishna-13-cyber Date: Fri, 19 Apr 2024 15:09:26 +0530 Subject: [PATCH 1/2] Add optimised LLVM IR for atomic increments/decrements on floats --- clang/lib/CodeGen/CGExprScalar.cpp| 13 + clang/test/CodeGen/X86/x86-atomic-float.c | 97 +++ .../test/CodeGen/X86/x86-atomic-long_double.c | 609 +- 3 files changed, 410 insertions(+), 309 deletions(-) create mode 100644 clang/test/CodeGen/X86/x86-atomic-float.c diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index 1f18e0d5ba409a..e97bb5c7e9dd16 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2792,6 +2792,19 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, llvm::AtomicOrdering::SequentiallyConsistent); return isPre ? Builder.CreateBinOp(op, old, amt) : old; } +// Special case for atomic increment/decrement on floats +if (type->isFloatingType()) { + llvm::AtomicRMWInst::BinOp aop = + isInc ? llvm::AtomicRMWInst::FAdd : llvm::AtomicRMWInst::FSub; + llvm::Instruction::BinaryOps op = + isInc ? llvm::Instruction::FAdd : llvm::Instruction::FSub; + llvm::Value *amt = llvm::ConstantFP::get( + VMContext, llvm::APFloat(static_cast(amount))); + llvm::Value *old = + Builder.CreateAtomicRMW(aop, LV.getAddress(CGF), amt, + llvm::AtomicOrdering::SequentiallyConsistent); + return isPre ? Builder.CreateBinOp(op, old, amt) : old; +} value = EmitLoadOfLValue(LV, E->getExprLoc()); input = value; // For every other atomic operation, we need to emit a load-op-cmpxchg loop diff --git a/clang/test/CodeGen/X86/x86-atomic-float.c b/clang/test/CodeGen/X86/x86-atomic-float.c new file mode 100644 index 00..89a2605ed44461 --- /dev/null +++ b/clang/test/CodeGen/X86/x86-atomic-float.c @@ -0,0 +1,97 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefix=CHECK32 %s + +// CHECK-LABEL: define dso_local i32 @test_int_inc( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK-NEXT:ret i32 [[TMP0]] +// +// CHECK32-LABEL: define dso_local i32 @test_int_inc( +// CHECK32-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK32-NEXT:ret i32 [[TMP0]] +// +int test_int_inc() +{ +static _Atomic int n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_inc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_inc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_inc() +{ +static _Atomic float n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_dc() +{ +static _Atomic float n; +return n--; +} + +// CHECK-LABEL: define dso_local float @test_float_pre_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK-NEXT:ret float [[TMP1]] +// +// CHECK32-LABEL: define dso_local float @test_float_pre_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK32-NEXT:
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
@@ -0,0 +1,97 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefix=CHECK32 %s RKSimon wrote: Reduce a lot of duplicate checks: ``` // RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefixes=CHECK,CHECK64 %s // RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefixes=CHECK,CHECK32 %s ``` https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Krishna Narayanan (Krishna-13-cyber) Changes Addresses #53079 --- Patch is 48.64 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/89362.diff 3 Files Affected: - (modified) clang/lib/CodeGen/CGExprScalar.cpp (+13) - (added) clang/test/CodeGen/X86/x86-atomic-float.c (+97) - (modified) clang/test/CodeGen/X86/x86-atomic-long_double.c (+300-309) ``diff diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index 1f18e0d5ba409a..e97bb5c7e9dd16 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2792,6 +2792,19 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, llvm::AtomicOrdering::SequentiallyConsistent); return isPre ? Builder.CreateBinOp(op, old, amt) : old; } +// Special case for atomic increment/decrement on floats +if (type->isFloatingType()) { + llvm::AtomicRMWInst::BinOp aop = + isInc ? llvm::AtomicRMWInst::FAdd : llvm::AtomicRMWInst::FSub; + llvm::Instruction::BinaryOps op = + isInc ? llvm::Instruction::FAdd : llvm::Instruction::FSub; + llvm::Value *amt = llvm::ConstantFP::get( + VMContext, llvm::APFloat(static_cast(amount))); + llvm::Value *old = + Builder.CreateAtomicRMW(aop, LV.getAddress(CGF), amt, + llvm::AtomicOrdering::SequentiallyConsistent); + return isPre ? Builder.CreateBinOp(op, old, amt) : old; +} value = EmitLoadOfLValue(LV, E->getExprLoc()); input = value; // For every other atomic operation, we need to emit a load-op-cmpxchg loop diff --git a/clang/test/CodeGen/X86/x86-atomic-float.c b/clang/test/CodeGen/X86/x86-atomic-float.c new file mode 100644 index 00..89a2605ed44461 --- /dev/null +++ b/clang/test/CodeGen/X86/x86-atomic-float.c @@ -0,0 +1,97 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefix=CHECK32 %s + +// CHECK-LABEL: define dso_local i32 @test_int_inc( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK-NEXT:ret i32 [[TMP0]] +// +// CHECK32-LABEL: define dso_local i32 @test_int_inc( +// CHECK32-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK32-NEXT:ret i32 [[TMP0]] +// +int test_int_inc() +{ +static _Atomic int n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_inc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_inc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_inc() +{ +static _Atomic float n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_dc() +{ +static _Atomic float n; +return n--; +} + +// CHECK-LABEL: define dso_local float @test_float_pre_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK-NEXT:ret float [[TMP1]] +// +// CHECK32-LABEL: define dso_local float @test_float_pre_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK32-NEXT:ret float [[TMP1]] +// +float test_float_pre_dc() +{ +static _Atomic float n; +return --n; +} + +// CHECK-LABEL: define dso_local float
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/Krishna-13-cyber converted_to_draft https://github.com/llvm/llvm-project/pull/89362 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [Clang][CodeGen] Optimised LLVM IR for atomic increments/decrements on floats (PR #89362)
https://github.com/Krishna-13-cyber created https://github.com/llvm/llvm-project/pull/89362 Addresses #53079 >From 4e649d105a2af038e6dbd0e93b457eebea2e543a Mon Sep 17 00:00:00 2001 From: Krishna-13-cyber Date: Fri, 19 Apr 2024 15:09:26 +0530 Subject: [PATCH] Add optimised LLVM IR for atomic increments/decrements on floats --- clang/lib/CodeGen/CGExprScalar.cpp| 13 + clang/test/CodeGen/X86/x86-atomic-float.c | 97 +++ .../test/CodeGen/X86/x86-atomic-long_double.c | 609 +- 3 files changed, 410 insertions(+), 309 deletions(-) create mode 100644 clang/test/CodeGen/X86/x86-atomic-float.c diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index 1f18e0d5ba409a..e97bb5c7e9dd16 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2792,6 +2792,19 @@ ScalarExprEmitter::EmitScalarPrePostIncDec(const UnaryOperator *E, LValue LV, llvm::AtomicOrdering::SequentiallyConsistent); return isPre ? Builder.CreateBinOp(op, old, amt) : old; } +// Special case for atomic increment/decrement on floats +if (type->isFloatingType()) { + llvm::AtomicRMWInst::BinOp aop = + isInc ? llvm::AtomicRMWInst::FAdd : llvm::AtomicRMWInst::FSub; + llvm::Instruction::BinaryOps op = + isInc ? llvm::Instruction::FAdd : llvm::Instruction::FSub; + llvm::Value *amt = llvm::ConstantFP::get( + VMContext, llvm::APFloat(static_cast(amount))); + llvm::Value *old = + Builder.CreateAtomicRMW(aop, LV.getAddress(CGF), amt, + llvm::AtomicOrdering::SequentiallyConsistent); + return isPre ? Builder.CreateBinOp(op, old, amt) : old; +} value = EmitLoadOfLValue(LV, E->getExprLoc()); input = value; // For every other atomic operation, we need to emit a load-op-cmpxchg loop diff --git a/clang/test/CodeGen/X86/x86-atomic-float.c b/clang/test/CodeGen/X86/x86-atomic-float.c new file mode 100644 index 00..89a2605ed44461 --- /dev/null +++ b/clang/test/CodeGen/X86/x86-atomic-float.c @@ -0,0 +1,97 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4 +// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck -check-prefix=CHECK32 %s + +// CHECK-LABEL: define dso_local i32 @test_int_inc( +// CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK-NEXT:ret i32 [[TMP0]] +// +// CHECK32-LABEL: define dso_local i32 @test_int_inc( +// CHECK32-SAME: ) #[[ATTR0:[0-9]+]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw add ptr @test_int_inc.n, i32 1 seq_cst, align 4 +// CHECK32-NEXT:ret i32 [[TMP0]] +// +int test_int_inc() +{ +static _Atomic int n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_inc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_inc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fadd ptr @test_float_post_inc.n, float 1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_inc() +{ +static _Atomic float n; +return n++; +} + +// CHECK-LABEL: define dso_local float @test_float_post_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:ret float [[TMP0]] +// +// CHECK32-LABEL: define dso_local float @test_float_post_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_post_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:ret float [[TMP0]] +// +float test_float_post_dc() +{ +static _Atomic float n; +return n--; +} + +// CHECK-LABEL: define dso_local float @test_float_pre_dc( +// CHECK-SAME: ) #[[ATTR0]] { +// CHECK-NEXT: entry: +// CHECK-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +// CHECK-NEXT:ret float [[TMP1]] +// +// CHECK32-LABEL: define dso_local float @test_float_pre_dc( +// CHECK32-SAME: ) #[[ATTR0]] { +// CHECK32-NEXT: entry: +// CHECK32-NEXT:[[TMP0:%.*]] = atomicrmw fsub ptr @test_float_pre_dc.n, float -1.00e+00 seq_cst, align 4 +// CHECK32-NEXT:[[TMP1:%.*]] = fsub float [[TMP0]], -1.00e+00 +//