[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();

tbaederr wrote:

```suggestion
  const auto *VecT = Call->getArg(0)->getType()->castAs();
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Shawn K via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From fc9a28f2aa7aa5d2d69b36b6582dd67bd9a6faf2 Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Thu, 2 Oct 2025 10:49:20 -0700
Subject: [PATCH 1/6] Squash commits for rebase

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   | 112 +++
 clang/lib/AST/ExprConstant.cpp |  91 ++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 310 +++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 331 +
 5 files changed, 856 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index a0181b7ae8f9d..41652259cf6a3 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2409,28 +2409,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 6053237b1a261..e4f158ea2cbf4 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2918,7 +2918,105 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog_maskz(InterpState &S, CodePtr OpPC,
+const CallExpr *Call) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const unsigned DstLen = VecT->getNumElements();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  const bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOr

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  unsigned DstLen = VecT->getNumElements();
+  bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOrEnumerationType();
+
+  APInt U = popToAPSInt(S, Call->getArg(4));
+  APInt Imm = popToAPSInt(S, Call->getArg(3));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APInt ALane;
+APInt BLane;
+APInt CLane;
+INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+  ALane = A.elem(I).toAPSInt();
+  BLane = B.elem(I).toAPSInt();
+  CLane = C.elem(I).toAPSInt();
+});
+const unsigned BitWidth = ALane.getBitWidth();
+APInt RLane(BitWidth, 0);
 
+if (U[I]) { // If lane not masked, compute ternary logic
+  for (unsigned Bit = 0; Bit < BitWidth; ++Bit) {

tbaederr wrote:

```suggestion
  for (unsigned Bit = 0; Bit != BitWidth; ++Bit) {
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Simon Pilgrim via cfe-commits 

https://github.com/RKSimon auto_merge_enabled 
https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  unsigned DstLen = VecT->getNumElements();
+  bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOrEnumerationType();
+
+  APInt U = popToAPSInt(S, Call->getArg(4));

tbaederr wrote:

What does U stand for?

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  unsigned DstLen = VecT->getNumElements();
+  bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOrEnumerationType();
+
+  APInt U = popToAPSInt(S, Call->getArg(4));
+  APInt Imm = popToAPSInt(S, Call->getArg(3));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {

tbaederr wrote:

```suggestion
  for (unsigned I = 0; I != DstLen; ++I) {
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Shawn K via cfe-commits 

kimsh02 wrote:

```
  if (Value.isSigned())
return this->emitConst(Value.getSExtValue(), Ty, E);
  return this->emitConst(Value.getZExtValue(), Ty, E);
```
❤️ 

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  unsigned DstLen = VecT->getNumElements();
+  bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOrEnumerationType();
+
+  APInt U = popToAPSInt(S, Call->getArg(4));
+  APInt Imm = popToAPSInt(S, Call->getArg(3));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APInt ALane;
+APInt BLane;
+APInt CLane;
+INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+  ALane = A.elem(I).toAPSInt();
+  BLane = B.elem(I).toAPSInt();
+  CLane = C.elem(I).toAPSInt();
+});
+const unsigned BitWidth = ALane.getBitWidth();
+APInt RLane(BitWidth, 0);
 
+if (U[I]) { // If lane not masked, compute ternary logic
+  for (unsigned Bit = 0; Bit < BitWidth; ++Bit) {
+unsigned ABit = ALane[Bit];
+unsigned BBit = BLane[Bit];
+unsigned CBit = CLane[Bit];
+
+unsigned Idx = (ABit << 2) | (BBit << 1) | (CBit);
+RLane.setBitVal(Bit, Imm[Idx]);
+  }
+  INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+Dst.elem(I) = static_cast(APSInt(RLane, DstUnsigned));
+  });
+} else if (MaskZ) { // If zero masked, zero the lane
+  INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+Dst.elem(I) = static_cast(APSInt(RLane, DstUnsigned));
+  });
+} else { // Just masked, put in A lane

tbaederr wrote:

```suggestion
} else { // Just masked, put in A lane.
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());

tbaederr wrote:

```suggestion
  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Shawn K via cfe-commits 

kimsh02 wrote:

As an update, I made better test cases with varying ternary operations and 
values, but I was not able to debug the handling in the new evaluator. There 
are three tests which pass from the old evaluator but does not pass from the 
new evaluator, and I have commented these failing tests.

What they failing tests have in common is that they hit the pternlogq512 path 
(512-bit, 64-bit lanes), although the new evaluator passes other tests that hit 
this path as well. What I have tried was reviewing my logic, and trying to 
replicate the code exactly as I had written it in the old evaluator (since the 
old evaluator is passing everything).

@tbaederr If anyone could have a look, that would be great 😅

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Shawn K via cfe-commits 

kimsh02 wrote:

@tbaederr 👍

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Shawn K via cfe-commits 


@@ -6273,40 +6273,350 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  0x6AA79987, (int)0xBB91433A, 0x029A7245, (int)0xD1F6F86C,
+  (int)0xD340BBCD, (int)0xCD8778E7, 0x4C73A942, (int)0xDAEA58BA,
+  0x5E503A67, (int)0xEE897110, 0x3193CA54, 0x452EC40A,
+  (int)0x90E5E945, 0x6FACAA50, 0x29645F8B, 0x5F811CB9
+})),
+((__m512i)((__v16si){
+  0x1FCFF454, (int)0xDFC9E3B1, 0x6ED4E94B, 0x42D6CB5C,
+  (int)0x8FE46024, (int)0xA091250E, 0x2CA1C789, (int)0x9C9CEA0C,
+  (int)0x8D9FE5B9, 0x2FD2B7A4, 0x5ADAD121, (int)0xBCF74D7A,
+  (int)0xF543BBCF, (int)0xBB9D58E4, 0x175F0CD2, (int)0x87F26AEE
+})),
+((__m512i)((__v16si){
+  (int)0xFA882692, (int)0xBC428D42, 0x6980A81F, (int)0x95C5FB98,
+  (int)0x8101E89A, 0x2AA4857E, 0x25ECE845, 0x34A9AF41,
+  (int)0xB80E3B0D, 0x13ED748B, 0x30A1F6D5, (int)0xD64A3CE0,
+  0x57708107, 0x527122DC, 0x06057C82, 0x7576714A
+})),
+(unsigned char)0x11), // ~A & ~C
+  0x00300929, 0x0034100C, (int)0x902B16A0, 0x28280423,
+  0x701A1741, 0x554A5A81, (int)0xD2121032, 0x434210B2,
+  0x42600042, (int)0xC850, (int)0x8504080A, 0x01008205,
+  0x088C4430, 0x04028503, (int)0xE8A0832D, 0x08098411));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  (int)0xA3B1799D, (int)0x46685257, (int)0x392456DE, (int)0xBC8960A9,
+  (int)0x6C031199, (int)0x07A0CA6E, (int)0x37F8A88B, (int)0x8B8148F6,
+  (int)0x386ECBE0, (int)0x96DA1DAC, (int)0xCE4A2BBD, (int)0xB2B9437A,
+  (int)0x571AA876, (int)0x27CD8130, (int)0x562B0F79, (int)0x17BE3111
+})),
+((__m512i)((__v16si){
+  (int)0x18C26797, (int)0xD8F56413, (int)0x9A8DCA03, (int)0xCE9FF57F,
+  (int)0xBACFB3D0, (int)0x89463E85, (int)0x60E7A113, (int)0x8D5288F1,
+  (int)0xDC98D2C1, (int)0x93CD59BF, (int)0xB45ED1F0, (int)0x19DB3AD0,
+  (int)0x47294739, (int)0x5D65A441, (int)0x5EC42E08, (int)0xA5E5A5AB
+})),
+((__m512i)((__v16si){
+  (int)0xBAA80DD4, (int)0x29D4BEEF, (int)0x6123FDF7, (int)0x8E944239,
+  (int)0xAF42E12F, (int)0xC6A7EE39, (int)0x50C187FC, (int)0x448AAA9E,
+  (int)0x508EBAD7, (int)0xA7CAD415, (int)0x757750A9, (int)0x43CF2FDE,
+  (int)0x95A76D79, (int)0x663F1C97, (int)0xFF5E9FF0, (int)0x827050A8
+})),
+(unsigned char)0x38), // (C & ~B) | (~C & A & B)
+  (int)0xBB311C08, (int)0x0E9C3644, (int)0x21219CDD, (int)0x32140090,
+  (int)0xC640A009, (int)0x86A6E46B, (int)0x57190998, (int)0x0683C006,
+  (int)0x60E61921, (int)0x05124411, (int)0x7A147A0D, (int)0xA36269AA,
+  (int)0x1033ED4F, (int)0x62A80531, (int)0x086F0171, (int)0x925A10B8));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  (int)0x3193CA54, (int)0x90E5E945, (int)0x29645F8B, (int)0x6ED4E94B,
+  (int)0x8D9FE5B9, (int)0x8101E89A, (int)0x25ECE845, (int)0xB80E3B0D,
+  (int)0x57708107, (int)0x06057C82, (int)0x56EAA301, (int)0xBE99854A,
+  (int)0x00E266D0, (int)0xDEEA959E, (int)0x2DCAABD5, (int)0x6A1ECCDA})),
+((__m512i)((__v16si){
+  (int)0x93FD7234, (int)0xBC90A6EC, (int)0xD3285151, (int)0xCE9FB6A8,
+  (int)0x3B788B66, (int)0xDF8960AD, (int)0x2F927291, (int)0x96AF0DEA,
+  (int)0xF56AE7EA, (int)0x2A04F77A, (int)0xD50B612B, (int)0x3AA725CB,
+  (int)0x8A04F74F, (int)0x282FE557, (int)0x52E1FBB0, (int)0x0CA02F4D})),
+((__m512i)((__v16si){
+  (int)0xB6307BAD, (int)0x141CB03E, (int)0xEBAA7701, (int)0xC9F0B072,
+  (int)0x5E2503DD, (int)0xC2E1DAC4, (int)0x0FC01B11, (int)0xA0485922,
+  (int)0x339BB47E, (int)0xB2D4F32A, (int)0x8E7AE9AF, (int)0x147DE9B0,
+  (int)0xF79FCAA0, (int)0x3B0B6398, (int)0x29DDF4C7, (int)0x49CDBEC7})),
+(unsigned char)0xC3), // ~(B ^ C)
+  (int)0x5D91479F, (int)0xD38AB056, (int)0x05B3F125, (int)0x5FB4A01C,
+  (int)0x49189120, (int)0xA1C8, (int)0xF581652B, (int)0xD15EC918,
+  (int)0x5DE59912, (int)0xD3FE7407, (int)0x7C1E3DD5, (int)0x7BC15F7E,
+  (int)0x75196E60, (int)0x093A8F36, (int)0x80D4AF9A, (int)0x99411C68));
 
 __m512i test_mm512_mask_ternarylogic_epi32(__m512i __A, __mmask16 __U, __m512i 
__B, __m512i __C) {
   // CHECK-LABEL: test_mm512_mask_ternarylogic_epi32
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 204)
   // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
   return _mm512_mask_ternarylogic_epi32(__A, __U, __B, __C, _MM_TERNLOG_B);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_mask_ternarylogic_epi32(
+_mm512_setr_epi32(
+  (int)0x, 0x, (int)0xDEADBEEF, (int)0xCAFEBABE, 
0x12345678, (int)0x87654321,
+  (int)0x, 0x, (int)0xF00DBEEF, (int)0xBAD2FEAF, 
0x0112358D, (int)0xDEADF00D,
+  (int)0x8BADF00D, (int)0xBADDCAFE, (int)0xBAADF00D, (int)0xBAAD),
+(__mmask16)

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Timm Baeder via cfe-commits 

tbaederr wrote:

Can you rebase this first? The patch doesn't apply on `main` right now.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Simon Pilgrim via cfe-commits 

https://github.com/RKSimon approved this pull request.

LGTM - cheers

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Shawn K via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From f0d96c20136c789812ec1bf961c7130e98f37a1d Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Thu, 2 Oct 2025 10:49:20 -0700
Subject: [PATCH 1/4] Squash commits for rebase

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   | 112 +++
 clang/lib/AST/ExprConstant.cpp |  91 ++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 310 +++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 331 +
 5 files changed, 856 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index e98bee28c15be..0ce9bb3be9351 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2405,28 +2405,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index a2e97fcafdfef..92ceed8a71fde 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2874,7 +2874,105 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog_maskz(InterpState &S, CodePtr OpPC,
+const CallExpr *Call) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const unsigned DstLen = VecT->getNumElements();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  const bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOr

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-18 Thread Shawn K via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From f0d96c20136c789812ec1bf961c7130e98f37a1d Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Thu, 2 Oct 2025 10:49:20 -0700
Subject: [PATCH 1/6] Squash commits for rebase

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   | 112 +++
 clang/lib/AST/ExprConstant.cpp |  91 ++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 310 +++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 331 +
 5 files changed, 856 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index e98bee28c15be..0ce9bb3be9351 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2405,28 +2405,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index a2e97fcafdfef..92ceed8a71fde 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2874,7 +2874,105 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog_maskz(InterpState &S, CodePtr OpPC,
+const CallExpr *Call) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const unsigned DstLen = VecT->getNumElements();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  const bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOr

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-17 Thread Simon Pilgrim via cfe-commits 

https://github.com/RKSimon updated 
https://github.com/llvm/llvm-project/pull/158703

>From fc9a28f2aa7aa5d2d69b36b6582dd67bd9a6faf2 Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Thu, 2 Oct 2025 10:49:20 -0700
Subject: [PATCH 1/6] Squash commits for rebase

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   | 112 +++
 clang/lib/AST/ExprConstant.cpp |  91 ++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 310 +++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 331 +
 5 files changed, 856 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index a0181b7ae8f9d..41652259cf6a3 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2409,28 +2409,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 6053237b1a261..e4f158ea2cbf4 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2918,7 +2918,105 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog_maskz(InterpState &S, CodePtr OpPC,
+const CallExpr *Call) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const unsigned DstLen = VecT->getNumElements();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  const bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOr

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-17 Thread Shawn K via cfe-commits 


@@ -6273,40 +6273,350 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  0x6AA79987, (int)0xBB91433A, 0x029A7245, (int)0xD1F6F86C,
+  (int)0xD340BBCD, (int)0xCD8778E7, 0x4C73A942, (int)0xDAEA58BA,
+  0x5E503A67, (int)0xEE897110, 0x3193CA54, 0x452EC40A,
+  (int)0x90E5E945, 0x6FACAA50, 0x29645F8B, 0x5F811CB9
+})),
+((__m512i)((__v16si){
+  0x1FCFF454, (int)0xDFC9E3B1, 0x6ED4E94B, 0x42D6CB5C,
+  (int)0x8FE46024, (int)0xA091250E, 0x2CA1C789, (int)0x9C9CEA0C,
+  (int)0x8D9FE5B9, 0x2FD2B7A4, 0x5ADAD121, (int)0xBCF74D7A,
+  (int)0xF543BBCF, (int)0xBB9D58E4, 0x175F0CD2, (int)0x87F26AEE
+})),
+((__m512i)((__v16si){
+  (int)0xFA882692, (int)0xBC428D42, 0x6980A81F, (int)0x95C5FB98,
+  (int)0x8101E89A, 0x2AA4857E, 0x25ECE845, 0x34A9AF41,
+  (int)0xB80E3B0D, 0x13ED748B, 0x30A1F6D5, (int)0xD64A3CE0,
+  0x57708107, 0x527122DC, 0x06057C82, 0x7576714A
+})),
+(unsigned char)0x11), // ~A & ~C
+  0x00300929, 0x0034100C, (int)0x902B16A0, 0x28280423,
+  0x701A1741, 0x554A5A81, (int)0xD2121032, 0x434210B2,
+  0x42600042, (int)0xC850, (int)0x8504080A, 0x01008205,
+  0x088C4430, 0x04028503, (int)0xE8A0832D, 0x08098411));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  (int)0xA3B1799D, (int)0x46685257, (int)0x392456DE, (int)0xBC8960A9,
+  (int)0x6C031199, (int)0x07A0CA6E, (int)0x37F8A88B, (int)0x8B8148F6,
+  (int)0x386ECBE0, (int)0x96DA1DAC, (int)0xCE4A2BBD, (int)0xB2B9437A,
+  (int)0x571AA876, (int)0x27CD8130, (int)0x562B0F79, (int)0x17BE3111
+})),
+((__m512i)((__v16si){
+  (int)0x18C26797, (int)0xD8F56413, (int)0x9A8DCA03, (int)0xCE9FF57F,
+  (int)0xBACFB3D0, (int)0x89463E85, (int)0x60E7A113, (int)0x8D5288F1,
+  (int)0xDC98D2C1, (int)0x93CD59BF, (int)0xB45ED1F0, (int)0x19DB3AD0,
+  (int)0x47294739, (int)0x5D65A441, (int)0x5EC42E08, (int)0xA5E5A5AB
+})),
+((__m512i)((__v16si){
+  (int)0xBAA80DD4, (int)0x29D4BEEF, (int)0x6123FDF7, (int)0x8E944239,
+  (int)0xAF42E12F, (int)0xC6A7EE39, (int)0x50C187FC, (int)0x448AAA9E,
+  (int)0x508EBAD7, (int)0xA7CAD415, (int)0x757750A9, (int)0x43CF2FDE,
+  (int)0x95A76D79, (int)0x663F1C97, (int)0xFF5E9FF0, (int)0x827050A8
+})),
+(unsigned char)0x38), // (C & ~B) | (~C & A & B)
+  (int)0xBB311C08, (int)0x0E9C3644, (int)0x21219CDD, (int)0x32140090,
+  (int)0xC640A009, (int)0x86A6E46B, (int)0x57190998, (int)0x0683C006,
+  (int)0x60E61921, (int)0x05124411, (int)0x7A147A0D, (int)0xA36269AA,
+  (int)0x1033ED4F, (int)0x62A80531, (int)0x086F0171, (int)0x925A10B8));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  (int)0x3193CA54, (int)0x90E5E945, (int)0x29645F8B, (int)0x6ED4E94B,
+  (int)0x8D9FE5B9, (int)0x8101E89A, (int)0x25ECE845, (int)0xB80E3B0D,
+  (int)0x57708107, (int)0x06057C82, (int)0x56EAA301, (int)0xBE99854A,
+  (int)0x00E266D0, (int)0xDEEA959E, (int)0x2DCAABD5, (int)0x6A1ECCDA})),
+((__m512i)((__v16si){
+  (int)0x93FD7234, (int)0xBC90A6EC, (int)0xD3285151, (int)0xCE9FB6A8,
+  (int)0x3B788B66, (int)0xDF8960AD, (int)0x2F927291, (int)0x96AF0DEA,
+  (int)0xF56AE7EA, (int)0x2A04F77A, (int)0xD50B612B, (int)0x3AA725CB,
+  (int)0x8A04F74F, (int)0x282FE557, (int)0x52E1FBB0, (int)0x0CA02F4D})),
+((__m512i)((__v16si){
+  (int)0xB6307BAD, (int)0x141CB03E, (int)0xEBAA7701, (int)0xC9F0B072,
+  (int)0x5E2503DD, (int)0xC2E1DAC4, (int)0x0FC01B11, (int)0xA0485922,
+  (int)0x339BB47E, (int)0xB2D4F32A, (int)0x8E7AE9AF, (int)0x147DE9B0,
+  (int)0xF79FCAA0, (int)0x3B0B6398, (int)0x29DDF4C7, (int)0x49CDBEC7})),
+(unsigned char)0xC3), // ~(B ^ C)
+  (int)0x5D91479F, (int)0xD38AB056, (int)0x05B3F125, (int)0x5FB4A01C,
+  (int)0x49189120, (int)0xA1C8, (int)0xF581652B, (int)0xD15EC918,
+  (int)0x5DE59912, (int)0xD3FE7407, (int)0x7C1E3DD5, (int)0x7BC15F7E,
+  (int)0x75196E60, (int)0x093A8F36, (int)0x80D4AF9A, (int)0x99411C68));
 
 __m512i test_mm512_mask_ternarylogic_epi32(__m512i __A, __mmask16 __U, __m512i 
__B, __m512i __C) {
   // CHECK-LABEL: test_mm512_mask_ternarylogic_epi32
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 204)
   // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
   return _mm512_mask_ternarylogic_epi32(__A, __U, __B, __C, _MM_TERNLOG_B);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_mask_ternarylogic_epi32(
+_mm512_setr_epi32(
+  (int)0x, 0x, (int)0xDEADBEEF, (int)0xCAFEBABE, 
0x12345678, (int)0x87654321,
+  (int)0x, 0x, (int)0xF00DBEEF, (int)0xBAD2FEAF, 
0x0112358D, (int)0xDEADF00D,
+  (int)0x8BADF00D, (int)0xBADDCAFE, (int)0xBAADF00D, (int)0xBAAD),
+(__mmask16)

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-17 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  unsigned DstLen = VecT->getNumElements();
+  bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOrEnumerationType();
+
+  APInt U = popToAPSInt(S, Call->getArg(4));
+  APInt Imm = popToAPSInt(S, Call->getArg(3));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APInt ALane;
+APInt BLane;
+APInt CLane;
+INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+  ALane = A.elem(I).toAPSInt();
+  BLane = B.elem(I).toAPSInt();
+  CLane = C.elem(I).toAPSInt();
+});
+const unsigned BitWidth = ALane.getBitWidth();
+APInt RLane(BitWidth, 0);
 
+if (U[I]) { // If lane not masked, compute ternary logic
+  for (unsigned Bit = 0; Bit < BitWidth; ++Bit) {
+unsigned ABit = ALane[Bit];
+unsigned BBit = BLane[Bit];
+unsigned CBit = CLane[Bit];
+
+unsigned Idx = (ABit << 2) | (BBit << 1) | (CBit);
+RLane.setBitVal(Bit, Imm[Idx]);
+  }
+  INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+Dst.elem(I) = static_cast(APSInt(RLane, DstUnsigned));
+  });
+} else if (MaskZ) { // If zero masked, zero the lane

tbaederr wrote:

```suggestion
} else if (MaskZ) { // If zero masked, zero the lane.
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-17 Thread Shawn K via cfe-commits 

kimsh02 wrote:

@tbaederr Is the branch fine now?

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-06 Thread Simon Pilgrim via cfe-commits 

https://github.com/RKSimon closed 
https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-03 Thread Timm Baeder via cfe-commits 


@@ -2874,7 +2874,62 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog(InterpState &S, CodePtr OpPC,
+  const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  unsigned DstLen = VecT->getNumElements();
+  bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOrEnumerationType();
+
+  APInt U = popToAPSInt(S, Call->getArg(4));
+  APInt Imm = popToAPSInt(S, Call->getArg(3));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APInt ALane;
+APInt BLane;
+APInt CLane;
+INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+  ALane = A.elem(I).toAPSInt();
+  BLane = B.elem(I).toAPSInt();
+  CLane = C.elem(I).toAPSInt();
+});
+const unsigned BitWidth = ALane.getBitWidth();

tbaederr wrote:

```suggestion
unsigned BitWidth = ALane.getBitWidth();
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-02 Thread Shawn K via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From f0d96c20136c789812ec1bf961c7130e98f37a1d Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Thu, 2 Oct 2025 10:49:20 -0700
Subject: [PATCH 1/5] Squash commits for rebase

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   | 112 +++
 clang/lib/AST/ExprConstant.cpp |  91 ++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 310 +++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 331 +
 5 files changed, 856 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index e98bee28c15be..0ce9bb3be9351 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2405,28 +2405,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index a2e97fcafdfef..92ceed8a71fde 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2874,7 +2874,105 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog_maskz(InterpState &S, CodePtr OpPC,
+const CallExpr *Call) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const unsigned DstLen = VecT->getNumElements();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  const bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOr

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-02 Thread Shawn K via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From ae7ddf1d897344b9095946e5fa4f65bb2a5d26ee Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Thu, 2 Oct 2025 10:49:20 -0700
Subject: [PATCH 1/2] Squash commits for rebase

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   | 112 +++
 clang/lib/AST/ExprConstant.cpp |  91 ++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 310 +++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 331 +
 5 files changed, 856 insertions(+), 4 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index e98bee28c15be..0ce9bb3be9351 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2405,28 +2405,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index a2e97fcafdfef..92ceed8a71fde 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2874,7 +2874,105 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
+  return true;
+}
+
+static bool interp__builtin_ia32_pternlog_maskz(InterpState &S, CodePtr OpPC,
+const CallExpr *Call) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  const unsigned DstLen = VecT->getNumElements();
+  const PrimType &DstElemT = *S.getContext().classify(VecT->getElementType());
+  const bool DstUnsigned =
+  VecT->getElementType()->isUnsignedIntegerOr

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-10-01 Thread Timm Baeder via cfe-commits 

tbaederr wrote:

Should work once https://github.com/llvm/llvm-project/pull/161506 is merged.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-30 Thread Shawn K via cfe-commits 

kimsh02 wrote:

> Can you rebase this first? The patch doesn't apply on `main` right now.

Okay, will do.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-30 Thread Shawn K via cfe-commits 


@@ -6273,40 +6273,350 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  0x6AA79987, (int)0xBB91433A, 0x029A7245, (int)0xD1F6F86C,
+  (int)0xD340BBCD, (int)0xCD8778E7, 0x4C73A942, (int)0xDAEA58BA,
+  0x5E503A67, (int)0xEE897110, 0x3193CA54, 0x452EC40A,
+  (int)0x90E5E945, 0x6FACAA50, 0x29645F8B, 0x5F811CB9
+})),
+((__m512i)((__v16si){
+  0x1FCFF454, (int)0xDFC9E3B1, 0x6ED4E94B, 0x42D6CB5C,
+  (int)0x8FE46024, (int)0xA091250E, 0x2CA1C789, (int)0x9C9CEA0C,
+  (int)0x8D9FE5B9, 0x2FD2B7A4, 0x5ADAD121, (int)0xBCF74D7A,
+  (int)0xF543BBCF, (int)0xBB9D58E4, 0x175F0CD2, (int)0x87F26AEE
+})),
+((__m512i)((__v16si){
+  (int)0xFA882692, (int)0xBC428D42, 0x6980A81F, (int)0x95C5FB98,
+  (int)0x8101E89A, 0x2AA4857E, 0x25ECE845, 0x34A9AF41,
+  (int)0xB80E3B0D, 0x13ED748B, 0x30A1F6D5, (int)0xD64A3CE0,
+  0x57708107, 0x527122DC, 0x06057C82, 0x7576714A
+})),
+(unsigned char)0x11), // ~A & ~C
+  0x00300929, 0x0034100C, (int)0x902B16A0, 0x28280423,
+  0x701A1741, 0x554A5A81, (int)0xD2121032, 0x434210B2,
+  0x42600042, (int)0xC850, (int)0x8504080A, 0x01008205,
+  0x088C4430, 0x04028503, (int)0xE8A0832D, 0x08098411));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  (int)0xA3B1799D, (int)0x46685257, (int)0x392456DE, (int)0xBC8960A9,
+  (int)0x6C031199, (int)0x07A0CA6E, (int)0x37F8A88B, (int)0x8B8148F6,
+  (int)0x386ECBE0, (int)0x96DA1DAC, (int)0xCE4A2BBD, (int)0xB2B9437A,
+  (int)0x571AA876, (int)0x27CD8130, (int)0x562B0F79, (int)0x17BE3111
+})),
+((__m512i)((__v16si){
+  (int)0x18C26797, (int)0xD8F56413, (int)0x9A8DCA03, (int)0xCE9FF57F,
+  (int)0xBACFB3D0, (int)0x89463E85, (int)0x60E7A113, (int)0x8D5288F1,
+  (int)0xDC98D2C1, (int)0x93CD59BF, (int)0xB45ED1F0, (int)0x19DB3AD0,
+  (int)0x47294739, (int)0x5D65A441, (int)0x5EC42E08, (int)0xA5E5A5AB
+})),
+((__m512i)((__v16si){
+  (int)0xBAA80DD4, (int)0x29D4BEEF, (int)0x6123FDF7, (int)0x8E944239,
+  (int)0xAF42E12F, (int)0xC6A7EE39, (int)0x50C187FC, (int)0x448AAA9E,
+  (int)0x508EBAD7, (int)0xA7CAD415, (int)0x757750A9, (int)0x43CF2FDE,
+  (int)0x95A76D79, (int)0x663F1C97, (int)0xFF5E9FF0, (int)0x827050A8
+})),
+(unsigned char)0x38), // (C & ~B) | (~C & A & B)
+  (int)0xBB311C08, (int)0x0E9C3644, (int)0x21219CDD, (int)0x32140090,
+  (int)0xC640A009, (int)0x86A6E46B, (int)0x57190998, (int)0x0683C006,
+  (int)0x60E61921, (int)0x05124411, (int)0x7A147A0D, (int)0xA36269AA,
+  (int)0x1033ED4F, (int)0x62A80531, (int)0x086F0171, (int)0x925A10B8));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){
+  (int)0x3193CA54, (int)0x90E5E945, (int)0x29645F8B, (int)0x6ED4E94B,
+  (int)0x8D9FE5B9, (int)0x8101E89A, (int)0x25ECE845, (int)0xB80E3B0D,
+  (int)0x57708107, (int)0x06057C82, (int)0x56EAA301, (int)0xBE99854A,
+  (int)0x00E266D0, (int)0xDEEA959E, (int)0x2DCAABD5, (int)0x6A1ECCDA})),
+((__m512i)((__v16si){
+  (int)0x93FD7234, (int)0xBC90A6EC, (int)0xD3285151, (int)0xCE9FB6A8,
+  (int)0x3B788B66, (int)0xDF8960AD, (int)0x2F927291, (int)0x96AF0DEA,
+  (int)0xF56AE7EA, (int)0x2A04F77A, (int)0xD50B612B, (int)0x3AA725CB,
+  (int)0x8A04F74F, (int)0x282FE557, (int)0x52E1FBB0, (int)0x0CA02F4D})),
+((__m512i)((__v16si){
+  (int)0xB6307BAD, (int)0x141CB03E, (int)0xEBAA7701, (int)0xC9F0B072,
+  (int)0x5E2503DD, (int)0xC2E1DAC4, (int)0x0FC01B11, (int)0xA0485922,
+  (int)0x339BB47E, (int)0xB2D4F32A, (int)0x8E7AE9AF, (int)0x147DE9B0,
+  (int)0xF79FCAA0, (int)0x3B0B6398, (int)0x29DDF4C7, (int)0x49CDBEC7})),
+(unsigned char)0xC3), // ~(B ^ C)
+  (int)0x5D91479F, (int)0xD38AB056, (int)0x05B3F125, (int)0x5FB4A01C,
+  (int)0x49189120, (int)0xA1C8, (int)0xF581652B, (int)0xD15EC918,
+  (int)0x5DE59912, (int)0xD3FE7407, (int)0x7C1E3DD5, (int)0x7BC15F7E,
+  (int)0x75196E60, (int)0x093A8F36, (int)0x80D4AF9A, (int)0x99411C68));
 
 __m512i test_mm512_mask_ternarylogic_epi32(__m512i __A, __mmask16 __U, __m512i 
__B, __m512i __C) {
   // CHECK-LABEL: test_mm512_mask_ternarylogic_epi32
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 204)
   // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
   return _mm512_mask_ternarylogic_epi32(__A, __U, __B, __C, _MM_TERNLOG_B);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_mask_ternarylogic_epi32(
+_mm512_setr_epi32(
+  (int)0x, 0x, (int)0xDEADBEEF, (int)0xCAFEBABE, 
0x12345678, (int)0x87654321,
+  (int)0x, 0x, (int)0xF00DBEEF, (int)0xBAD2FEAF, 
0x0112358D, (int)0xDEADF00D,
+  (int)0x8BADF00D, (int)0xBADDCAFE, (int)0xBAADF00D, (int)0xBAAD),
+(__mmask16)

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-27 Thread Shawn K via cfe-commits 

kimsh02 wrote:

@tbaederr I'm still working on it. Much appreciated for checking in!

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-27 Thread Shawn K via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From 1b81bf79bc7e6a2c1df846b27e4a95cf1cb97090 Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 01/14] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  91 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 6 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 044c755d4d7cf..b411e583b1a2c 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2402,28 +2402,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 77729a5d67c87..00466aa7ae663 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2952,10 +2952,57 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
-
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType())

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-27 Thread Timm Baeder via cfe-commits 

tbaederr wrote:

Are you still stuck with a problem? I can have a look.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-27 Thread via cfe-commits 


@@ -6246,40 +6246,178 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 
0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),
+((__m512i)((__v16si){0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 
0xB, 0xB, 0xB, 0xB, 0xB, 0xB})),
+((__m512i)((__v16si){0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 
0xC, 0xC, 0xC, 0xC, 0xC, 0xC})),
+(unsigned char)0xCA),
+  0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 
0xC));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE),
+  0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 
0xF));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0x80),
+  0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 
0x0));

kimsh02 wrote:

I ran into a bug while I was adding better test cases where my handling was 
passing in the old evaluator but not the new one. 

I'm going to attempt to debug it tomorrow, and I've closed the PR for now.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-23 Thread via cfe-commits 


@@ -6246,40 +6246,178 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 
0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),
+((__m512i)((__v16si){0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 
0xB, 0xB, 0xB, 0xB, 0xB, 0xB})),
+((__m512i)((__v16si){0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 
0xC, 0xC, 0xC, 0xC, 0xC, 0xC})),
+(unsigned char)0xCA),
+  0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 
0xC));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE),
+  0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 
0xF));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0x80),
+  0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 
0x0));

kimsh02 wrote:

I seem to be stuck on finding the issue with my handling. Is there a way to 
build clang that runs with debug print inside a method? Or perhaps I should use 
the debugger.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-22 Thread via cfe-commits 


@@ -6246,40 +6246,191 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 
0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),
+((__m512i)((__v16si){0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 
0xB, 0xB, 0xB, 0xB, 0xB, 0xB})),
+((__m512i)((__v16si){0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 
0xC, 0xC, 0xC, 0xC, 0xC, 0xC})),
+(unsigned char)0xCA), // A ? B : C
+  0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 
0xC));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE), // A | B | C
+  0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 
0xF));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0x80), // A & B & C
+  0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 
0x0));
 
 __m512i test_mm512_mask_ternarylogic_epi32(__m512i __A, __mmask16 __U, __m512i 
__B, __m512i __C) {
   // CHECK-LABEL: test_mm512_mask_ternarylogic_epi32
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 204)
   // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> %{{.*}}
   return _mm512_mask_ternarylogic_epi32(__A, __U, __B, __C, _MM_TERNLOG_B);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_mask_ternarylogic_epi32(
+((__m512i)((__v16si){0x1, 0x0, 0x2, 0x0, 0x3, 0x0, 0x4, 0x0,
+ 0x5, 0x0, 0x6, 0x0, 0x7, 0x0, 0x8, 0x0})),
+(__mmask16)0xA55A,
+((__m512i)((__v16si){0xA, 0xB, 0xC, 0xD, 0xE, 0xF, 0x10, 0x11,
+ 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19})),
+((__m512i)((__v16si){0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8,
+ 0x9, 0xA, 0xB, 0xC, 0xD, 0xE, 0xF, 0x10})),
+(unsigned char)0xCA), // A ? B : C
+  0x1, 0x2, 0x2, 0x4, 0x6, 0x0, 0x3, 0x0, 0x8, 0x0, 0xD, 0x0, 0x7, 0xE, 0x8, 
0x10));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_mask_ternarylogic_epi32(
+((__m512i)((__v16si){0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,
+ 0x8, 0x9, 0xA, 0xB, 0xC, 0xD, 0xE, 0xF})),
+(__mmask16)0x0F0F,
+((__m512i)((__v16si){0x1, 0x2, 0x4, 0x8, 0x1, 0x2, 0x4, 0x8,
+ 0x1, 0x2, 0x4, 0x8, 0x1, 0x2, 0x4, 0x8})),
+((__m512i)((__v16si){0x10, 0x20, 0x40, 0x80, 0x10, 0x20, 0x40, 0x80,
+ 0x10, 0x20, 0x40, 0x80, 0x10, 0x20, 0x40, 0x80})),
+(unsigned char)0xFE), // A | B | C
+  0x11, 0x23, 0x46, 0x8B, 0x4, 0x5, 0x6, 0x7, 0x19, 0x2B, 0x4E, 0x8B, 0xC, 
0xD, 0xE, 0xF));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_mask_ternarylogic_epi32(
+((__m512i)((__v16si){0xF, 0x7, 0x3, 0x1, 0xF, 0x7, 0x3, 0x1,
+ 0xFF, 0xF, 0xF0, 0xAA, 0x55, 0xCC, 0x33, 0xFF})),
+(__mmask16)0x,
+((__m512i)((__v16si){0xE, 0x7, 0x2, 0x1, 0xF, 0x0, 0x3, 0x0,
+ 0xF, 0xF0, 0xFF, 0x55, 0x55, 0x33, 0x33, 0xF})),
+((__m512i)((__v16si){0xD, 0x7, 0x0, 0x1, 0xF, 0x7, 0x0, 0x1,
+ 0xF0, 0xF, 0xF, 0xFF, 0xF, 0xCC, 0x33, 0xF0})),
+(unsigned char)0x80), // A & B & C
+  0xF, 0x7, 0x3, 0x1, 0xF, 0x0, 0x3, 0x0, 0xFF, 0x0, 0xF0, 0x0, 0x55, 0x0, 
0x33, 0x0));
 
 __m512i test_mm512_maskz_ternarylogic_epi32(__mmask16 __U, __m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK-LABEL: test_mm512_maskz_ternarylogic_epi32
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 170)
   // CHECK: select <16 x i1> %{{.*}}, <16 x i32> %{{.*}}, <16 x i32> 
zeroinitializer
   return _mm512_maskz_ternarylogic_epi32(__U, __A, __B, __C, _MM_TERNLOG_C);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_maskz_ternarylogic_epi32(
+(__mmask16)0x,
+((__m512i)((__v16si){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 
0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),
+((__m512i)((__v16si){0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 
0xB, 0xB, 0xB, 0xB, 0xB, 0xB})),
+((__m512i)((__v16si){0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 
0xC, 0xC, 0xC, 0xC, 0xC, 0xC})),
+(unsigned char)0xCA), // A ? B : C
+  0xB, 0xC, 0x0, 0x0, 0xB, 0xC, 0x0, 0x0,

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-22 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From 1b81bf79bc7e6a2c1df846b27e4a95cf1cb97090 Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 01/11] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  91 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 6 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 044c755d4d7cf..b411e583b1a2c 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2402,28 +2402,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 77729a5d67c87..00466aa7ae663 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2952,10 +2952,57 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
-
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType())

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-22 Thread via cfe-commits 

https://github.com/kimsh02 edited 
https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-22 Thread via cfe-commits 

https://github.com/kimsh02 converted_to_draft 
https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-22 Thread Simon Pilgrim via cfe-commits 


@@ -6246,40 +6246,178 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 
0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),
+((__m512i)((__v16si){0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 
0xB, 0xB, 0xB, 0xB, 0xB, 0xB})),
+((__m512i)((__v16si){0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 
0xC, 0xC, 0xC, 0xC, 0xC, 0xC})),
+(unsigned char)0xCA),
+  0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 
0xC));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE),
+  0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 
0xF));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0x80),
+  0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 
0x0));

RKSimon wrote:

Up to 3 per builtin is fine - cheers

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-22 Thread via cfe-commits 


@@ -6246,40 +6246,178 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 
0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),
+((__m512i)((__v16si){0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 
0xB, 0xB, 0xB, 0xB, 0xB, 0xB})),
+((__m512i)((__v16si){0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 
0xC, 0xC, 0xC, 0xC, 0xC, 0xC})),
+(unsigned char)0xCA),
+  0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 
0xC));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE),
+  0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 
0xF));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0x80),
+  0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 
0x0));

kimsh02 wrote:

Okay, is it fine if I simply add more test cases, or should I keep it at 3 per 
builtin? 

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-22 Thread Simon Pilgrim via cfe-commits 


@@ -6246,40 +6246,178 @@ __m512i test_mm512_ternarylogic_epi32(__m512i __A, 
__m512i __B, __m512i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.512({{.*}}, i32 240)
   return _mm512_ternarylogic_epi32(__A, __B, __C, _MM_TERNLOG_A);
 }
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){-0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 
0x0, -0x1, 0x0, -0x1, 0x0, -0x1, 0x0})),
+((__m512i)((__v16si){0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 0xB, 
0xB, 0xB, 0xB, 0xB, 0xB, 0xB})),
+((__m512i)((__v16si){0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 0xC, 
0xC, 0xC, 0xC, 0xC, 0xC, 0xC})),
+(unsigned char)0xCA),
+  0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 0xC, 0xB, 
0xC));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE),
+  0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 0xF, 
0xF));
+TEST_CONSTEXPR(match_v16si(
+  _mm512_ternarylogic_epi32(
+((__m512i)((__v16si){0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 0x9, 
0x9, 0x9, 0x9, 0x9, 0x9, 0x9})),
+((__m512i)((__v16si){0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 0x4, 
0x4, 0x4, 0x4, 0x4, 0x4, 0x4})),
+((__m512i)((__v16si){0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 
0x2, 0x2, 0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0x80),
+  0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 
0x0));

RKSimon wrote:

It'd be better if the tests didn't use the same value for every element in most 
of the tests

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-19 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From 1b81bf79bc7e6a2c1df846b27e4a95cf1cb97090 Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/9] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  91 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 6 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 044c755d4d7cf..b411e583b1a2c 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2402,28 +2402,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 77729a5d67c87..00466aa7ae663 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2952,10 +2952,57 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
-
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-19 Thread Simon Pilgrim via cfe-commits 

https://github.com/RKSimon requested changes to this pull request.

please can you merge against trunk 

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-19 Thread via cfe-commits 

kimsh02 wrote:

I couldn't get clang-format to change any files, my recent push was just to 
rebase.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-19 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From 1b81bf79bc7e6a2c1df846b27e4a95cf1cb97090 Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/9] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  91 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 6 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 044c755d4d7cf..b411e583b1a2c 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2402,28 +2402,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 77729a5d67c87..00466aa7ae663 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2952,10 +2952,57 @@ static bool 
interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
   });
 
   Dst.initializeAllElements();
-
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-17 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/8] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-17 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/7] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-17 Thread Timm Baeder via cfe-commits 


@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)));

tbaederr wrote:

```suggestion
  APSInt U = popToAPSInt(S, Call->getArg(4));
```
Needs a rebase for that though.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread Timm Baeder via cfe-commits 


@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)));
+  APSInt Imm = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(3)));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APSInt a, b, c;
+INT_TYPE_SWITCH(DstElemT, {
+  a = A.elem(I).toAPSInt();
+  b = B.elem(I).toAPSInt();
+  c = C.elem(I).toAPSInt();
+});
+
+unsigned BitWidth = a.getBitWidth();
+APInt R(BitWidth, 0);
+bool DstUnsigned = a.isUnsigned();
+
+if (U[I]) {
+  for (unsigned Bit = 0; Bit < BitWidth; ++Bit) {
+unsigned Idx = (a[Bit] << 2) | (b[Bit] << 1) | (c[Bit]);
+R.setBitVal(Bit, Imm[Idx]);
+  }
+  INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+Dst.elem(I) = static_cast(APSInt(R, DstUnsigned));
+  });
+} else if (MaskZ) {
+  INT_TYPE_SWITCH_NO_BOOL(DstElemT, {
+Dst.elem(I) = static_cast(APSInt(R, DstUnsigned));

tbaederr wrote:

So this just zeroes the element?

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 


@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)));
+  APSInt Imm = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(3)));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APSInt a, b, c;

kimsh02 wrote:

Sorry! Fixed it.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 


@@ -8229,80 +8229,357 @@ __m128i test_mm_ternarylogic_epi32(__m128i __A, 
__m128i __B, __m128i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.128
   return _mm_ternarylogic_epi32(__A, __B, __C, 4); 
 }
+TEST_CONSTEXPR(match_v4si(
+  _mm_ternarylogic_epi32(
+((__m128i)((__v4si){-0x1, 0x0, -0x1, 0x0})),
+((__m128i)((__v4si){0xB, 0xB, 0xB, 0xB})),
+((__m128i)((__v4si){0xC, 0xC, 0xC, 0xC })),
+(unsigned char)0xCA),
+  0xB, 0xC, 0xB, 0xC));
+TEST_CONSTEXPR(match_v4si(
+  _mm_ternarylogic_epi32(
+((__m128i)((__v4si){0x9, 0x9, 0x9, 0x9})),
+((__m128i)((__v4si){0x4, 0x4, 0x4, 0x4})),
+((__m128i)((__v4si){0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE),
+  0xF, 0xF, 0xF, 0xF));
+TEST_CONSTEXPR(match_v4si(
+  _mm_ternarylogic_epi32(
+((__m128i)((__v4si){0x9, 0x9, 0x9, 0x9})),
+((__m128i)((__v4si){0x4, 0x4, 0x4, 0x4})),
+((__m128i)((__v4si){0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0x80),

kimsh02 wrote:

`0x80` is bitwise `a & b & c`

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 


@@ -8229,80 +8229,357 @@ __m128i test_mm_ternarylogic_epi32(__m128i __A, 
__m128i __B, __m128i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.128
   return _mm_ternarylogic_epi32(__A, __B, __C, 4); 
 }
+TEST_CONSTEXPR(match_v4si(
+  _mm_ternarylogic_epi32(
+((__m128i)((__v4si){-0x1, 0x0, -0x1, 0x0})),
+((__m128i)((__v4si){0xB, 0xB, 0xB, 0xB})),
+((__m128i)((__v4si){0xC, 0xC, 0xC, 0xC })),
+(unsigned char)0xCA),
+  0xB, 0xC, 0xB, 0xC));
+TEST_CONSTEXPR(match_v4si(
+  _mm_ternarylogic_epi32(
+((__m128i)((__v4si){0x9, 0x9, 0x9, 0x9})),
+((__m128i)((__v4si){0x4, 0x4, 0x4, 0x4})),
+((__m128i)((__v4si){0x2, 0x2, 0x2, 0x2})),
+(unsigned char)0xFE),

kimsh02 wrote:

`0xFE` is bitwise `a | b | c`

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 


@@ -8229,80 +8229,357 @@ __m128i test_mm_ternarylogic_epi32(__m128i __A, 
__m128i __B, __m128i __C) {
   // CHECK: @llvm.x86.avx512.pternlog.d.128
   return _mm_ternarylogic_epi32(__A, __B, __C, 4); 
 }
+TEST_CONSTEXPR(match_v4si(
+  _mm_ternarylogic_epi32(
+((__m128i)((__v4si){-0x1, 0x0, -0x1, 0x0})),
+((__m128i)((__v4si){0xB, 0xB, 0xB, 0xB})),
+((__m128i)((__v4si){0xC, 0xC, 0xC, 0xC })),
+(unsigned char)0xCA),

kimsh02 wrote:

`0xCA` is bitwise `a ? b : c`

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/7] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 

github-actions[bot] wrote:




:warning: C/C++ code formatter, clang-format found issues in your code. 
:warning:



You can test this locally with the following command:


``bash
git-clang-format --diff origin/main HEAD --extensions c,cpp -- 
clang/lib/AST/ByteCode/InterpBuiltin.cpp clang/lib/AST/ExprConstant.cpp 
clang/test/CodeGen/X86/avx512f-builtins.c 
clang/test/CodeGen/X86/avx512vl-builtins.c
``

:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:





View the diff from clang-format here.


``diff
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 3c0796118..1e51fdf44 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2975,7 +2975,8 @@ static bool interp__builtin_pternlog(InterpState &S, 
CodePtr OpPC,
   });
 } else if (MaskZ) {
   INT_TYPE_SWITCH_NO_BOOL(DstElemT, { /* Zeroes lane */
-Dst.elem(I) = static_cast(APSInt(RLane, DstUnsigned));
+  Dst.elem(I) = static_cast(
+  APSInt(RLane, DstUnsigned));
   });
 } else {
   INT_TYPE_SWITCH_NO_BOOL(DstElemT,

``




https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/6] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/5] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/4] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/3] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-16 Thread via cfe-commits 

https://github.com/kimsh02 updated 
https://github.com/llvm/llvm-project/pull/158703

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH 1/2] [Clang] VectorExprEvaluator::VisitCallExpr /
 InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in
 constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)))

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-15 Thread Timm Baeder via cfe-commits 


@@ -3543,7 +3592,20 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, 
const CallExpr *Call,
   case X86::BI__builtin_ia32_selectpd_256:
   case X86::BI__builtin_ia32_selectpd_512:
 return interp__builtin_select(S, OpPC, Call);
-
+  case X86::BI__builtin_ia32_pternlogd128_mask:
+  case X86::BI__builtin_ia32_pternlogd256_mask:
+  case X86::BI__builtin_ia32_pternlogd512_mask:
+  case X86::BI__builtin_ia32_pternlogq128_mask:
+  case X86::BI__builtin_ia32_pternlogq256_mask:
+  case X86::BI__builtin_ia32_pternlogq512_mask:
+return interp__builtin_pternlog(S, OpPC, Call, false);

tbaederr wrote:

```suggestion
return interp__builtin_pternlog(S, OpPC, Call, /*MaskZ=*/false);
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-15 Thread Timm Baeder via cfe-commits 


@@ -3543,7 +3592,20 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, 
const CallExpr *Call,
   case X86::BI__builtin_ia32_selectpd_256:
   case X86::BI__builtin_ia32_selectpd_512:
 return interp__builtin_select(S, OpPC, Call);
-
+  case X86::BI__builtin_ia32_pternlogd128_mask:
+  case X86::BI__builtin_ia32_pternlogd256_mask:
+  case X86::BI__builtin_ia32_pternlogd512_mask:
+  case X86::BI__builtin_ia32_pternlogq128_mask:
+  case X86::BI__builtin_ia32_pternlogq256_mask:
+  case X86::BI__builtin_ia32_pternlogq512_mask:
+return interp__builtin_pternlog(S, OpPC, Call, false);
+  case X86::BI__builtin_ia32_pternlogd128_maskz:
+  case X86::BI__builtin_ia32_pternlogd256_maskz:
+  case X86::BI__builtin_ia32_pternlogd512_maskz:
+  case X86::BI__builtin_ia32_pternlogq128_maskz:
+  case X86::BI__builtin_ia32_pternlogq256_maskz:
+  case X86::BI__builtin_ia32_pternlogq512_maskz:
+return interp__builtin_pternlog(S, OpPC, Call, true);

tbaederr wrote:

```suggestion
return interp__builtin_pternlog(S, OpPC, Call, /*MaskZ=*/true);
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-15 Thread Timm Baeder via cfe-commits 


@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)));
+  APSInt Imm = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(3)));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APSInt a, b, c;
+INT_TYPE_SWITCH(DstElemT, {
+  a = A.elem(I).toAPSInt();
+  b = B.elem(I).toAPSInt();
+  c = C.elem(I).toAPSInt();
+});
+
+unsigned BitWidth = a.getBitWidth();
+APInt R(BitWidth, 0);
+bool DstUnsigned = a.isUnsigned();
+
+if (U[I]) {
+  for (unsigned Bit = 0; Bit < BitWidth; ++Bit) {

tbaederr wrote:

```suggestion
  for (unsigned Bit = 0; Bit != BitWidth; ++Bit) {
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-15 Thread Timm Baeder via cfe-commits 


@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)));
+  APSInt Imm = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(3)));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {

tbaederr wrote:

```suggestion
  for (unsigned I = 0; I != DstLen; ++I) {
```

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-15 Thread Timm Baeder via cfe-commits 


@@ -2903,6 +2903,55 @@ static bool interp__builtin_elementwise_triop(
   return true;
 }
 
+static bool interp__builtin_pternlog(InterpState &S, CodePtr OpPC,
+ const CallExpr *Call, bool MaskZ) {
+  assert(Call->getNumArgs() == 5);
+
+  const VectorType *VecT = Call->getArg(0)->getType()->castAs();
+  unsigned DstLen = VecT->getNumElements();
+  PrimType DstElemT = *S.getContext().classify(VecT->getElementType());
+
+  APSInt U = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(4)));
+  APSInt Imm = popToAPSInt(S.Stk, *S.getContext().classify(Call->getArg(3)));
+  const Pointer &C = S.Stk.pop();
+  const Pointer &B = S.Stk.pop();
+  const Pointer &A = S.Stk.pop();
+
+  const Pointer &Dst = S.Stk.peek();
+
+  for (unsigned I = 0; I < DstLen; ++I) {
+APSInt a, b, c;

tbaederr wrote:

Not too happy about the lowercase naming here.

https://github.com/llvm/llvm-project/pull/158703
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[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-15 Thread via cfe-commits 

llvmbot wrote:




@llvm/pr-subscribers-backend-x86

Author: Shawn (kimsh02)


Changes

Fix #157698 

Add handling for `__builtin_ia32_pternlog[d/q][128/256/512]_mask[z]` intrinsics 
to `VectorExprEvaluator::VisitCallExpr` and `InterpBuiltin.cpp` with the 
corresponding test coverage:

```
_mm_mask_ternarylogic_epi32
_mm_maskz_ternarylogic_epi32
_mm_ternarylogic_epi32
_mm256_mask_ternarylogic_epi32
_mm256_maskz_ternarylogic_epi32
_mm256_ternarylogic_epi32
_mm512_mask_ternarylogic_epi32
_mm512_maskz_ternarylogic_epi32
_mm512_ternarylogic_epi32
_mm_mask_ternarylogic_epi64
_mm_maskz_ternarylogic_epi64
_mm_ternarylogic_epi64
_mm256_mask_ternarylogic_epi64
_mm256_maskz_ternarylogic_epi64
_mm256_ternarylogic_epi64
_mm512_mask_ternarylogic_epi64
_mm512_maskz_ternarylogic_epi64
_mm512_ternarylogic_epi64
```

---

Patch is 35.42 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/158703.diff


5 Files Affected:

- (modified) clang/include/clang/Basic/BuiltinsX86.td (+12-4) 
- (modified) clang/lib/AST/ByteCode/InterpBuiltin.cpp (+63-1) 
- (modified) clang/lib/AST/ExprConstant.cpp (+90) 
- (modified) clang/test/CodeGen/X86/avx512f-builtins.c (+138) 
- (modified) clang/test/CodeGen/X86/avx512vl-builtins.c (+277) 


``diff
diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuiltin.cpp 
b/clang/lib/AST/ByteCode/InterpBuiltin.cpp
index 4461731c25648..4004e9fca86b8 100644
--- a/clang/lib/AST/ByteCode/InterpBuiltin.cpp
+++ b/clang/lib/AST/ByteC

[clang] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr (PR #158703)

2025-09-15 Thread via cfe-commits 

https://github.com/kimsh02 created 
https://github.com/llvm/llvm-project/pull/158703

Fix #157698 

Add handling for `__builtin_ia32_pternlog[d/q][128/256/512]_mask[z]` intrinsics 
to `VectorExprEvaluator::VisitCallExpr` and `InterpBuiltin.cpp` with the 
corresponding test coverage:

```
_mm_mask_ternarylogic_epi32
_mm_maskz_ternarylogic_epi32
_mm_ternarylogic_epi32
_mm256_mask_ternarylogic_epi32
_mm256_maskz_ternarylogic_epi32
_mm256_ternarylogic_epi32
_mm512_mask_ternarylogic_epi32
_mm512_maskz_ternarylogic_epi32
_mm512_ternarylogic_epi32
_mm_mask_ternarylogic_epi64
_mm_maskz_ternarylogic_epi64
_mm_ternarylogic_epi64
_mm256_mask_ternarylogic_epi64
_mm256_maskz_ternarylogic_epi64
_mm256_ternarylogic_epi64
_mm512_mask_ternarylogic_epi64
_mm512_maskz_ternarylogic_epi64
_mm512_ternarylogic_epi64
```

>From e49dc71e548a561db03368317373c6b3f23ec47e Mon Sep 17 00:00:00 2001
From: kimsh02 
Date: Mon, 15 Sep 2025 10:58:34 -0700
Subject: [PATCH] [Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin
 - add AVX512 VPTERNLOGD/VPTERNLOGQ intrinsics to be used in constexpr

---
 clang/include/clang/Basic/BuiltinsX86.td   |  16 +-
 clang/lib/AST/ByteCode/InterpBuiltin.cpp   |  64 -
 clang/lib/AST/ExprConstant.cpp |  90 +++
 clang/test/CodeGen/X86/avx512f-builtins.c  | 138 ++
 clang/test/CodeGen/X86/avx512vl-builtins.c | 277 +
 5 files changed, 580 insertions(+), 5 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 1a8645f99e281..a4335256f6deb 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2398,28 +2398,36 @@ let Features = "avx512f", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>
   def psraq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
   def psrld512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Vector<4, 
int>)">;
   def psrlq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Vector<2, long long int>)">;
+}
+
+let Features = "avx512f",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
   def pternlogd512_mask : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogd512_maskz : X86Builtin<"_Vector<16, int>(_Vector<16, int>, 
_Vector<16, int>, _Vector<16, int>, _Constant int, unsigned short)">;
   def pternlogq512_mask : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq512_maskz : X86Builtin<"_Vector<8, long long int>(_Vector<8, 
long long int>, _Vector<8, long long int>, _Vector<8, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogd128_mask : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
   def pternlogd128_maskz : X86Builtin<"_Vector<4, int>(_Vector<4, int>, 
_Vector<4, int>, _Vector<4, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogd256_mask : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
   def pternlogd256_maskz : X86Builtin<"_Vector<8, int>(_Vector<8, int>, 
_Vector<8, int>, _Vector<8, int>, _Constant int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
   def pternlogq128_mask : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq128_maskz : X86Builtin<"_Vector<2, long long int>(_Vector<2, 
long long int>, _Vector<2, long long int>, _Vector<2, long long int>, _Constant 
int, unsigned char)">;
 }
 
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+let Features = "avx512vl",
+Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
   def pternlogq256_mask : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
   def pternlogq256_maskz : X86Builtin<"_Vector<4, long long int>(_Vector<4, 
long long int>, _Vector<4, long long int>, _Vector<4, long long int>, _Constant 
int, unsigned char)">;
 }
diff --git a/clang/lib/AST/ByteCode/InterpBuilt