[GitHub] [mynewt-core] kasjer commented on a change in pull request #2543: net/ip: Update receive windows in lwip_recvfrom
kasjer commented on a change in pull request #2543:
URL: https://github.com/apache/mynewt-core/pull/2543#discussion_r603509894
##
File path: net/ip/lwip_mn/src/lwip_socket.c
##
@@ -593,6 +593,9 @@ lwip_recvfrom(struct mn_socket *ms, struct os_mbuf **mp,
#endif
}
}
+if (s->ls_type == MN_SOCK_STREAM) {
Review comment:
done
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[GitHub] [mynewt-core] mkiiskila commented on a change in pull request #2543: net/ip: Update receive windows in lwip_recvfrom
mkiiskila commented on a change in pull request #2543:
URL: https://github.com/apache/mynewt-core/pull/2543#discussion_r603439146
##
File path: net/ip/lwip_mn/src/lwip_socket.c
##
@@ -593,6 +593,9 @@ lwip_recvfrom(struct mn_socket *ms, struct os_mbuf **mp,
#endif
}
}
+if (s->ls_type == MN_SOCK_STREAM) {
Review comment:
Should make this code conditional on #if LWIP_TCP.
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[mynewt-core] branch master updated: hw: mcu: kinetis: Fix dual flash QSPI support
This is an automated email from the ASF dual-hosted git repository.
utzig pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-core.git
The following commit(s) were added to refs/heads/master by this push:
new f784382 hw: mcu: kinetis: Fix dual flash QSPI support
new ffabfdd Merge pull request #2548 from utzig/fix-k8x-dual-qspi
f784382 is described below
commit f7843827640954cdc7760698a5097143e6b1f2cb
Author: Fabio Utzig
AuthorDate: Tue Mar 23 12:13:42 2021 -0300
hw: mcu: kinetis: Fix dual flash QSPI support
Update the QSPI flash driver so it can work correctly with two flashes
connected to the two QSPI channels. This is currenctly limited to using
two QSPI flashes of the same type.
Signed-off-by: Fabio Utzig
---
hw/mcu/nxp/kinetis/src/hal_qspi.c | 102 --
1 file changed, 75 insertions(+), 27 deletions(-)
diff --git a/hw/mcu/nxp/kinetis/src/hal_qspi.c
b/hw/mcu/nxp/kinetis/src/hal_qspi.c
index cea45a3..a9eff8a 100644
--- a/hw/mcu/nxp/kinetis/src/hal_qspi.c
+++ b/hw/mcu/nxp/kinetis/src/hal_qspi.c
@@ -93,13 +93,31 @@ uint32_t MX25U3235F_LUT[FSL_FEATURE_QSPI_LUT_DEPTH] = {
};
+#if MYNEWT_VAL(QSPIB_ENABLE) && !(FSL_FEATURE_QSPI_SUPPORT_PARALLEL_MODE)
+#error "This device has no parallel mode support (please disable QSPIB)"
+#endif
+
+/*
+ * XXX: This driver currently has the following limitations:
+ * * QSPIA and QSPIB must use a QSPI flash of the same size (and model).
+ * * Flashes with dual-die package are not supported.
+ */
+
static qspi_flash_config_t g_qspi_flash_cfg = {
+#if MYNEWT_VAL(QSPIA_ENABLE)
.flashA1Size = MYNEWT_VAL(QSPI_FLASH_SECTOR_COUNT) *
MYNEWT_VAL(QSPI_FLASH_SECTOR_SIZE),
+#else
+.flashA1Size = 0,
+#endif
.flashA2Size = 0,
#if (FSL_FEATURE_QSPI_SUPPORT_PARALLEL_MODE)
-.flashA1Size = MYNEWT_VAL(QSPI_FLASH_SECTOR_COUNT) *
MYNEWT_VAL(QSPI_FLASH_SECTOR_SIZE),
-.flashA2Size = 0,
+#if MYNEWT_VAL(QSPIB_ENABLE)
+.flashB1Size = MYNEWT_VAL(QSPI_FLASH_SECTOR_COUNT) *
MYNEWT_VAL(QSPI_FLASH_SECTOR_SIZE),
+#else
+.flashB1Size = 0,
#endif
+.flashB2Size = 0,
+#endif /* (FSL_FEATURE_QSPI_SUPPORT_PARALLEL_MODE) */
#if (!FSL_FEATURE_QSPI_HAS_NO_TDH)
.dataHoldTime = 0,
#endif
@@ -281,22 +299,33 @@ nxp_qspi_erase_sector(const struct hal_flash *dev,
uint32_t sector_address)
void
nxp_qspi_erase_chip(void)
{
+int chips = (MYNEWT_VAL(QSPIA_ENABLE) ? 1 : 0) +
+(MYNEWT_VAL(QSPIB_ENABLE) ? 1 : 0);
+uint32_t address;
+
while (qspi_in_use(QuadSPI0));
os_mutex_pend(&g_mtx, OS_TIMEOUT_NEVER);
-QSPI_ClearFifo(QuadSPI0, kQSPI_TxFifo);
-QSPI_SetIPCommandAddress(QuadSPI0, FSL_FEATURE_QSPI_AMBA_BASE);
-cmd_write_enable();
-QSPI_ExecuteIPCommand(QuadSPI0, LUT_CMD_ERASE_CHIP);
-wait_until_finished();
-while (qspi_in_use(QuadSPI0));
+address = FSL_FEATURE_QSPI_AMBA_BASE;
+while (chips > 0) {
+QSPI_ClearFifo(QuadSPI0, kQSPI_TxFifo);
+QSPI_SetIPCommandAddress(QuadSPI0, address);
+cmd_write_enable();
+QSPI_ExecuteIPCommand(QuadSPI0, LUT_CMD_ERASE_CHIP);
+wait_until_finished();
+while (qspi_in_use(QuadSPI0));
#if QSPI_HAS_CLR
-QSPI_ClearCache(QuadSPI0);
+QSPI_ClearCache(QuadSPI0);
#endif
-QSPI_SoftwareReset(QuadSPI0);
+QSPI_SoftwareReset(QuadSPI0);
+
+address += MYNEWT_VAL(QSPI_FLASH_SECTOR_SIZE) *
+ MYNEWT_VAL(QSPI_FLASH_SECTOR_COUNT);
+chips--;
+}
os_mutex_release(&g_mtx);
}
@@ -362,26 +391,37 @@ nxp_qspi_sector_info(const struct hal_flash *dev,
static void
enable_quad_mode(void)
{
-QSPI_SetIPCommandAddress(QuadSPI0, FSL_FEATURE_QSPI_AMBA_BASE);
+int chips = (MYNEWT_VAL(QSPIA_ENABLE) ? 1 : 0) +
+(MYNEWT_VAL(QSPIB_ENABLE) ? 1 : 0);
+uint32_t address;
-QSPI_ClearFifo(QuadSPI0, kQSPI_TxFifo);
+address = FSL_FEATURE_QSPI_AMBA_BASE;
+while (chips > 0) {
+QSPI_SetIPCommandAddress(QuadSPI0, address);
-cmd_write_enable();
+QSPI_ClearFifo(QuadSPI0, kQSPI_TxFifo);
-/*
- * Set QE bit to enable quad mode.
- *
- * XXX need extra writes to fill the FIFO
- */
-QSPI_WriteData(QuadSPI0, 0xff40);
-QSPI_WriteData(QuadSPI0, 0x);
-QSPI_WriteData(QuadSPI0, 0x);
-QSPI_WriteData(QuadSPI0, 0x);
+cmd_write_enable();
+
+/*
+ * Set QE bit to enable quad mode.
+ *
+ * XXX need extra writes to fill the FIFO
+ */
+QSPI_WriteData(QuadSPI0, 0xff40);
+QSPI_WriteData(QuadSPI0, 0x);
+QSPI_WriteData(QuadSPI0, 0x);
+QSPI_WriteData(QuadSPI0, 0x);
-QSPI_ExecuteIPCommand(QuadSPI0, LUT_CMD_WRITE_STATUS);
+QSPI_ExecuteIPCommand(QuadSPI0, LUT_CMD_WRITE_STATUS);
-wait_until_finished();
-while (qspi_in_use(QuadSPI0));
+wait_until
[GitHub] [mynewt-core] utzig merged pull request #2548: hw: mcu: kinetis: Fix dual flash QSPI support
utzig merged pull request #2548: URL: https://github.com/apache/mynewt-core/pull/2548 -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
[GitHub] [mynewt-core] apache-mynewt-bot commented on pull request #2548: hw: mcu: kinetis: Fix dual flash QSPI support
apache-mynewt-bot commented on pull request #2548:
URL: https://github.com/apache/mynewt-core/pull/2548#issuecomment-809368897
## Style check summary
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[GitHub] [mynewt-core] utzig opened a new pull request #2548: hw: mcu: kinetis: Fix dual flash QSPI support
utzig opened a new pull request #2548: URL: https://github.com/apache/mynewt-core/pull/2548 Update the QSPI flash driver so it can work correctly with two flashes connected to the two QSPI channels. This is currenctly limited to using two QSPI flashes of the same type. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
[GitHub] [mynewt-nimble] sjanc commented on issue #897: Support for host RPA generation on the host
sjanc commented on issue #897: URL: https://github.com/apache/mynewt-nimble/issues/897#issuecomment-809337842 yeah, it was not on top of our prio list but if you want to work on that feature please do :) I would have to be configurable via syscfg, being able to enable only for host-only build, preferable with no changes to public APIs It would also be awesome if you could add 1-2 tests to host's "newt test" which would exercise this code a bit, that would help us to maintain this feature as functional (since most people use LL privacy) -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
[GitHub] [mynewt-nimble] haukepetersen merged pull request #952: npl/riot: enable BLE_HCI_VS in default config
haukepetersen merged pull request #952: URL: https://github.com/apache/mynewt-nimble/pull/952 -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
[mynewt-nimble] branch master updated: npl/riot: enable BLE_HCI_VS in default config
This is an automated email from the ASF dual-hosted git repository.
hauke pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
The following commit(s) were added to refs/heads/master by this push:
new 4fae6e1 npl/riot: enable BLE_HCI_VS in default config
4fae6e1 is described below
commit 4fae6e1ab723c8a94b58e1a30818d8862b2e59fd
Author: Hauke Petersen
AuthorDate: Thu Mar 25 13:06:38 2021 +0100
npl/riot: enable BLE_HCI_VS in default config
---
porting/npl/riot/include/syscfg/syscfg.h | 44
porting/targets/riot/syscfg.yml | 1 +
2 files changed, 45 insertions(+)
diff --git a/porting/npl/riot/include/syscfg/syscfg.h
b/porting/npl/riot/include/syscfg/syscfg.h
index 816f410..f7406f0 100644
--- a/porting/npl/riot/include/syscfg/syscfg.h
+++ b/porting/npl/riot/include/syscfg/syscfg.h
@@ -15,6 +15,45 @@
#define MYNEWT_VAL(_name) MYNEWT_VAL_ ## _name
#define MYNEWT_VAL_CHOICE(_name, _val) MYNEWT_VAL_ ## _name ## __ ##
_val
+
+/*** Repository @apache-mynewt-core info */
+#ifndef MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_CORE
+#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_CORE
("6b205affd69a6f05787264fa2c70c621bbbdd325")
+#endif
+
+#ifndef MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_CORE
+#define MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_CORE ("0.0.0")
+#endif
+
+/*** Repository @apache-mynewt-mcumgr info */
+#ifndef MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_MCUMGR
+#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_MCUMGR
("64f5060bd8bb466367e0da94da8b425d5b9f6388")
+#endif
+
+#ifndef MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_MCUMGR
+#define MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_MCUMGR ("0.0.0")
+#endif
+
+/*** Repository @apache-mynewt-nimble info */
+#ifndef MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_NIMBLE
+#define MYNEWT_VAL_REPO_HASH_APACHE_MYNEWT_NIMBLE
("3e5d7a994e117b2758906154433a1aac860cc845-dirty")
+#endif
+
+#ifndef MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_NIMBLE
+#define MYNEWT_VAL_REPO_VERSION_APACHE_MYNEWT_NIMBLE ("0.0.0")
+#endif
+
+/*** Repository @mcuboot info */
+#ifndef MYNEWT_VAL_REPO_HASH_MCUBOOT
+#define MYNEWT_VAL_REPO_HASH_MCUBOOT
("579b30c2860f9f7d843a25ff5453b6542cce")
+#endif
+
+#ifndef MYNEWT_VAL_REPO_VERSION_MCUBOOT
+#define MYNEWT_VAL_REPO_VERSION_MCUBOOT ("0.0.0")
+#endif
+
+
+
/*** @apache-mynewt-core/compiler/arm-none-eabi-m4 */
#ifndef MYNEWT_VAL_HARDFLOAT
#define MYNEWT_VAL_HARDFLOAT (0)
@@ -775,6 +814,11 @@
#define MYNEWT_VAL_BLE_EXT_ADV_MAX_SIZE (31)
#endif
+/* Overridden by @apache-mynewt-nimble/porting/targets/riot (defined by
@apache-mynewt-nimble/nimble) */
+#ifndef MYNEWT_VAL_BLE_HCI_VS
+#define MYNEWT_VAL_BLE_HCI_VS (1)
+#endif
+
#ifndef MYNEWT_VAL_BLE_ISO
#define MYNEWT_VAL_BLE_ISO (0)
#endif
diff --git a/porting/targets/riot/syscfg.yml b/porting/targets/riot/syscfg.yml
index d6ee102..8359eaa 100644
--- a/porting/targets/riot/syscfg.yml
+++ b/porting/targets/riot/syscfg.yml
@@ -18,6 +18,7 @@
syscfg.vals:
BLE_ACL_BUF_COUNT: 24
+BLE_HCI_VS: 1
BLE_HCI_EVT_HI_BUF_COUNT: 2
BLE_HW_WHITELIST_ENABLE: 0
BLE_LL_CFG_FEAT_DATA_LEN_EXT: 0
[GitHub] [mynewt-nimble] andrzej-kaczmarek merged pull request #944: nimble/ll_conn: Fix for frag tx of mbufs >255 bytes
andrzej-kaczmarek merged pull request #944: URL: https://github.com/apache/mynewt-nimble/pull/944 -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
[mynewt-nimble] branch master updated: nimble/ll: Fix for frag tx of mbufs >255 bytes
This is an automated email from the ASF dual-hosted git repository.
andk pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git
The following commit(s) were added to refs/heads/master by this push:
new f0a5e96 nimble/ll: Fix for frag tx of mbufs >255 bytes
f0a5e96 is described below
commit f0a5e96db2026c1178ee5e76a2eb0a4fd78b487c
Author: Niklas Casaril
AuthorDate: Fri Mar 19 17:30:06 2021 +1000
nimble/ll: Fix for frag tx of mbufs >255 bytes
---
nimble/controller/src/ble_ll_conn.c | 19 +--
nimble/controller/src/ble_ll_conn_priv.h | 2 +-
nimble/include/nimble/ble.h | 4 ++--
3 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/nimble/controller/src/ble_ll_conn.c
b/nimble/controller/src/ble_ll_conn.c
index b8352f4..7da7147 100644
--- a/nimble/controller/src/ble_ll_conn.c
+++ b/nimble/controller/src/ble_ll_conn.c
@@ -959,8 +959,8 @@ ble_ll_conn_tx_pdu(struct ble_ll_conn_sm *connsm)
uint8_t hdr_byte;
uint8_t end_transition;
uint8_t cur_txlen;
-uint8_t next_txlen;
-uint8_t cur_offset;
+uint16_t next_txlen;
+uint16_t cur_offset;
uint16_t pktlen;
uint32_t next_event_time;
uint32_t ticks;
@@ -1129,11 +1129,10 @@ ble_ll_conn_tx_pdu(struct ble_ll_conn_sm *connsm)
if ((cur_offset + cur_txlen) < pktlen) {
next_txlen = pktlen - (cur_offset + cur_txlen);
} else {
-if (nextpkthdr->omp_len > connsm->eff_max_tx_octets) {
-next_txlen = connsm->eff_max_tx_octets;
-} else {
-next_txlen = nextpkthdr->omp_len;
-}
+next_txlen = connsm->eff_max_tx_octets;
+}
+if (next_txlen > connsm->eff_max_tx_octets) {
+next_txlen = connsm->eff_max_tx_octets;
}
/*
@@ -1491,7 +1490,7 @@ ble_ll_conn_can_send_next_pdu(struct ble_ll_conn_sm
*connsm, uint32_t begtime,
uint32_t add_usecs)
{
int rc;
-uint8_t rem_bytes;
+uint16_t rem_bytes;
uint32_t ticks;
uint32_t usecs;
uint32_t next_sched_time;
@@ -3791,7 +3790,7 @@ ble_ll_conn_rx_isr_end(uint8_t *rxbuf, struct
ble_mbuf_hdr *rxhdr)
uint8_t conn_sn;
uint8_t conn_nesn;
uint8_t reply;
-uint8_t rem_bytes;
+uint16_t rem_bytes;
uint8_t opcode = 0;
uint8_t rx_pyld_len;
uint32_t begtime;
@@ -4074,7 +4073,7 @@ conn_exit:
*/
void
ble_ll_conn_enqueue_pkt(struct ble_ll_conn_sm *connsm, struct os_mbuf *om,
-uint8_t hdr_byte, uint8_t length)
+uint8_t hdr_byte, uint16_t length)
{
os_sr_t sr;
struct os_mbuf_pkthdr *pkthdr;
diff --git a/nimble/controller/src/ble_ll_conn_priv.h
b/nimble/controller/src/ble_ll_conn_priv.h
index 53358c4..915a4d2 100644
--- a/nimble/controller/src/ble_ll_conn_priv.h
+++ b/nimble/controller/src/ble_ll_conn_priv.h
@@ -120,7 +120,7 @@ struct hci_create_conn
void ble_ll_conn_sm_new(struct ble_ll_conn_sm *connsm);
void ble_ll_conn_end(struct ble_ll_conn_sm *connsm, uint8_t ble_err);
void ble_ll_conn_enqueue_pkt(struct ble_ll_conn_sm *connsm, struct os_mbuf *om,
- uint8_t hdr_byte, uint8_t length);
+ uint8_t hdr_byte, uint16_t length);
struct ble_ll_conn_sm *ble_ll_conn_sm_get(void);
void ble_ll_conn_master_init(struct ble_ll_conn_sm *connsm,
struct hci_create_conn *hcc);
diff --git a/nimble/include/nimble/ble.h b/nimble/include/nimble/ble.h
index 248e8ae..1ddd577 100644
--- a/nimble/include/nimble/ble.h
+++ b/nimble/include/nimble/ble.h
@@ -109,9 +109,9 @@ struct ble_mbuf_hdr_rxinfo
struct ble_mbuf_hdr_txinfo
{
uint8_t flags;
-uint8_t offset;
-uint8_t pyld_len;
uint8_t hdr_byte;
+uint16_t offset;
+uint16_t pyld_len;
};
struct ble_mbuf_hdr
[mynewt-nimble] branch master updated (3e5d7a9 -> 8cd76e5)
This is an automated email from the ASF dual-hosted git repository. andk pushed a change to branch master in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git. from 3e5d7a9 Prepare for Apache NimBLE 1.4.0 release add 8cd76e5 nimble/hs: Fix mbuf allocation for combined build No new revisions were added by this update. Summary of changes: nimble/host/src/ble_hs_mbuf.c | 4 1 file changed, 4 insertions(+)
[GitHub] [mynewt-nimble] andrzej-kaczmarek merged pull request #953: nimble/hs: Fix mbuf allocation for combined build
andrzej-kaczmarek merged pull request #953: URL: https://github.com/apache/mynewt-nimble/pull/953 -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. For queries about this service, please contact Infrastructure at: us...@infra.apache.org
