acassis merged PR #11737:
URL: https://github.com/apache/nuttx/pull/11737
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acassis commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1988952824
@nicolas71640 thank you very much for your investigation on these issues and
for making things work! Kudos!!!
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xiaoxiang781216 commented on code in PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#discussion_r1519784635
##
arch/arm/src/xmc4/xmc4_tickless.c:
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+ *
xiaoxiang781216 commented on code in PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#discussion_r1519784376
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arch/arm/src/xmc4/xmc4_tickless.c:
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nicolas71640 commented on code in PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#discussion_r1519713127
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arch/arm/src/xmc4/xmc4_tickless.c:
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xiaoxiang781216 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1988399027
@nicolas71640 please squash the change into one patch and fix the nxstyle
issue reported by:
https://github.com/apache/nuttx/actions/runs/8233183407/job/22512126340?pr=11737
pkarashchenko commented on code in PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#discussion_r1517062746
##
arch/arm/src/xmc4/xmc4_tickless.c:
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xiaoxiang781216 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1982417695
@nicolas71640 could you squash the patch into one?
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patacongo commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1979614816
> @patacongo I think @nicolas71640 meant that he had reduced the resolution
to 10usec for the benchmark test. Right @nicolas71640 ?
Right. my mistake. There is no overhead to a
trns1997 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1979606592
> > @raiden00pl Very good to know ! I didn't know that nuttx had this
integrated ! I might have a look
> > @patacongo @trns1997 Yes, the resolution was 100uS. I have tested our
patacongo commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1979578412
> @raiden00pl Very good to know ! I didn't know that nuttx had this
integrated ! I might have a look
> @patacongo @trns1997 Yes, the resolution was 100uS. I have tested our
patacongo commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1979572609
> @patacongo I think you are right the CONFIG_USEC_PER_TICK is set to
default 100uSec. @nicolas71640 I think it might be worth reducing this value to
see if it changes anything but tbf
nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1979546706
@raiden00pl Very good to know ! I didn't know that nuttx had this
integrated ! I might have a look
@patacongo @trns1997 Yes, the resolution was 100uS. I have tested our
trns1997 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1979444111
> > Here we can see that, event if the interrupt of thread A has been
triggered before the end of ThreadB routine, the delay between the end of
ThreadB routine and the start of ThreadA
patacongo commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1978850747
> Here we can see that, event if the interrupt of thread A has been
triggered before the end of ThreadB routine, the delay between the end of
ThreadB routine and the start of ThreadA
raiden00pl commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1978811913
@nicolas71640 Infineon dev boards come with built-in J-Link if I remember
correctly, so I recommend using SystemView to debug time related problems. This
way you can get much more
nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1978797607
I have actually tried the tickless mode on the STM32. I have the exact same
behavior. My benchmark (we use an OTSS benchmark for every OS we use), where we
have 4 threads with
acassis commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1978778089
@nicolas71640 I suggest you to try Tickless in some architecture that
already has it implemented because it works fine without these drawbacks you
are seeing. My company uses Tickless
nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1978414862
Hello everybody,
Thanks @xiaoxiang781216 for your answer. I was just about to post the
conclusion of my issue.
I have improved a bit my diagrams and my understanding of
xiaoxiang781216 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1978340826
@nicolas71640 I would suggest that you utilize the common code to implement
timer related up_xxx api:
https://github.com/apache/nuttx/blob/master/drivers/timers/arch_alarm.c
acassis commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1975188322
Hi @nicolas71640 very nice test. I don't know much about the Tickless
implementation, but I think thread A will need to setup a new timer to wake-up
thread B, because otherwise will not
nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1975179637
Hello Everybody,
Thank you for all your feedbacks.
I might be at the end of the road concerning xmc tickless... The
performances are far from being acceptable
xiaoxiang781216 commented on code in PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#discussion_r1505862092
##
arch/arm/src/xmc4/xmc4_ccu4.c:
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@@ -0,0 +1,195 @@
+/
+ *
acassis commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1960303777
@nicolas71640 please fix also the coding style issues raised by CI
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nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1959934095
I have found the issue. It was hardware indeed, but not from the side I've
looked for...
On the xmc, the CCU clocks is by default disable on sleep mode... Didn't
know... So the
nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1959491855
Sorry about wrong closes/reopen the PR.
> @nicolas71640 do you need to change some XMC45's timer register to let the
second event to happen? Seems like a hardware issue.
nicolas71640 closed pull request #11746: arch/xmc4 Add tickless support
URL: https://github.com/apache/nuttx/pull/11746
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nicolas71640 commented on PR #11746:
URL: https://github.com/apache/nuttx/pull/11746#issuecomment-1959486659
Wrong manipulation. Closed this PR by error :
https://github.com/apache/nuttx/pull/11737
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nicolas71640 opened a new pull request, #11746:
URL: https://github.com/apache/nuttx/pull/11746
## Summary
Add Tickless support of xmc4 chip
## Impact
## Testing
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nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1959478205
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nicolas71640 closed pull request #11737: arch/xmc4 Add tickless support
URL: https://github.com/apache/nuttx/pull/11737
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acassis commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1959453045
> For a bit more info :
>
> I do a usleep(60) between two Hello world print, and here's the output.
>
> ```
> Hello, World!!
> up_timer_gettime: usec=349525 ts=(0,
nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1957399177
For a bit more info :
I do a usleep(60) between two Hello world print, and here's the output.
```
Hello, World!!
up_timer_gettime: usec=349525 ts=(0,
acassis commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1957183035
@xiaoxiang781216 @raiden00pl @pkarashchenko @patacongo any idea? Inside the
critical section we disable IRQ so I think this is by design, but not idea how
tickless handles it.
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nicolas71640 commented on PR #11737:
URL: https://github.com/apache/nuttx/pull/11737#issuecomment-1957143866
Hi everyone,
As you can see in this MR, I'm trying to add the tickless support for xmc4
chip.
However I couldn't make it work, that's why I'd need your help.
nicolas71640 opened a new pull request, #11737:
URL: https://github.com/apache/nuttx/pull/11737
## Summary
Add Tickless support of xmc4 chip
## Impact
## Testing
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