This is an automated email from the ASF dual-hosted git repository.

jerpelea pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/nuttx.git

commit 2fd95611cb568057e19aed12d49dc78f0172a5ae
Author: chao an <anc...@lixiang.com>
AuthorDate: Thu Jan 18 08:49:29 2024 +0800

    risc-v/cmake: configurable vendor ISA extensions
    
    merge below commit into cmake:
    
    1. risc-v/toolchain: configurable vendor ISA extensions
    
    This option allows the platform to enable some vendor-customized ISA 
extensions,
    E.g OpenHW, SiFive, T-Head.
    
    SiFive Intelligence Extensions:
        SiFive Vector Coprocessor Interface(VCIX): xsfvcp
        SiFive FP32-to-int8 Ranged Clip Instructions: Xsfvfnrclipxfqf
        SiFive Matrix Multiply Accumulate Instructions: Xsfvfwmaccqqq
        SiFive Int8 Matrix Multiplication Instructions: XSFvqmaccqoq
    Command Line:
        xsfvcp0p1_xsfvfnrclipxfqf0p1_xsfvfwmaccqqq0p1_xsfvqmaccqoq0p1
    
    2. "V" Standard Extension for Vector Operations
    3. "Q" Standard Extension for Quad-Precision Floating-Point
    
    Signed-off-by: chao an <anc...@lixiang.com>
---
 arch/risc-v/src/cmake/Toolchain.cmake | 45 +++++++++++++++++++++++++++--------
 1 file changed, 35 insertions(+), 10 deletions(-)

diff --git a/arch/risc-v/src/cmake/Toolchain.cmake 
b/arch/risc-v/src/cmake/Toolchain.cmake
index 55152fd42e..0965c88e86 100644
--- a/arch/risc-v/src/cmake/Toolchain.cmake
+++ b/arch/risc-v/src/cmake/Toolchain.cmake
@@ -184,24 +184,52 @@ if(${CONFIG_RISCV_TOOLCHAIN} STREQUAL GNU_RVG)
     set(ARCHRVISAZ "_zicsr_zifencei")
   endif()
 
+  set(ARCHCPUEXTFLAGS i)
+
   if(CONFIG_ARCH_RV_ISA_M)
-    set(ARCHRVISAM m)
+    set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}m)
   endif()
 
   if(CONFIG_ARCH_RV_ISA_A)
-    set(ARCHRVISAA a)
+    set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}a)
+  endif()
+
+  if(CONFIG_ARCH_FPU)
+    set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}f)
+  endif()
+
+  if(CONFIG_ARCH_DPFPU)
+    set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}d)
+  endif()
+
+  if(CONFIG_ARCH_QPFPU)
+    set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}q)
   endif()
 
   if(CONFIG_ARCH_RV_ISA_C)
-    set(ARCHRVISAC c)
+    set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}c)
   endif()
 
-  if(CONFIG_ARCH_FPU)
-    set(ARCHRVISAF f)
+  if(CONFIG_ARCH_RV_ISA_V)
+    set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}v)
   endif()
 
-  if(CONFIG_ARCH_DPFPU)
-    set(ARCHRVISAD d)
+  if(CONFIG_ARCH_RV_ISA_ZICSR_ZIFENCEI)
+    if(NOT DEFINED GCCVER)
+      execute_process(COMMAND ${CMAKE_CXX_COMPILER} --version
+                      OUTPUT_VARIABLE GCC_VERSION_OUTPUT)
+      string(REGEX MATCH "\\+\\+.* ([0-9]+)\\.[0-9]+" GCC_VERSION_REGEX
+                   "${GCC_VERSION_OUTPUT}")
+      set(GCCVER ${CMAKE_MATCH_1})
+    endif()
+    if(GCCVER GREATER_EQUAL 12)
+      set(ARCHCPUEXTFLAGS ${ARCHCPUEXTFLAGS}_zicsr_zifencei)
+    endif()
+  endif()
+
+  if(CONFIG_ARCH_RV_ISA_VENDOR_EXTENSIONS)
+    set(ARCHCPUEXTFLAGS
+        ${ARCHCPUEXTFLAGS}_${CONFIG_ARCH_RV_ISA_VENDOR_EXTENSIONS})
   endif()
 
   # Detect abi type
@@ -218,9 +246,6 @@ if(${CONFIG_RISCV_TOOLCHAIN} STREQUAL GNU_RVG)
 
   # Construct arch flags
 
-  set(ARCHCPUEXTFLAGS
-      
i${ARCHRVISAM}${ARCHRVISAA}${ARCHRVISAF}${ARCHRVISAD}${ARCHRVISAC}${ARCHRVISAZ}
-  )
   set(ARCHCPUFLAGS -march=${ARCHTYPE}${ARCHCPUEXTFLAGS})
 
   # Construct arch abi flags

Reply via email to