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commit c60d5c2ea13ce5555bae3fbef6aea3771ec18f18
Author: Tiago Medicci Serrano <tiago.medi...@espressif.com>
AuthorDate: Mon Oct 9 17:13:13 2023 -0300
esp32s3/wireless: Fix typo
The CPU 2 interrupt source (which is not used for anything else) is
used to off-load BLE data after a SPI flash operation.
---
arch/xtensa/src/esp32s3/esp32s3_wireless.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/xtensa/src/esp32s3/esp32s3_wireless.c
b/arch/xtensa/src/esp32s3/esp32s3_wireless.c
index 052b6fac8e..c74bf12f2a 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_wireless.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_wireless.c
@@ -741,7 +741,7 @@ IRAM_ATTR void esp_post_semcache(struct esp_semcache_s *sc)
sc->count++;
- /* Enable CPU 0 interrupt. This will generate an IRQ as soon as non-IRAM
+ /* Enable CPU 2 interrupt. This will generate an IRQ as soon as non-IRAM
* are (re)enabled.
*/
