This is an automated email from the ASF dual-hosted git repository.
jerpelea pushed a commit to branch master
in repository https://gitbox.apache.org/repos/asf/incubator-nuttx.git
The following commit(s) were added to refs/heads/master by this push:
new 370152f3ba RISC-V: Move mhartid to own assembly macro+function
370152f3ba is described below
commit 370152f3baa652c02c358ca164bdcac0c5e50d67
Author: Ville Juven <ville.ju...@unikie.com>
AuthorDate: Thu Apr 7 14:23:23 2022 +0300
RISC-V: Move mhartid to own assembly macro+function
Hartid and cpuindex are not the same thing. Hartid is needed regardless
of SMP, for external interrupt handling etc.
SMP needs cpuindex which might not be index == hartid, so both are
needed. IMO it is clearer to provide separate API for both.
Currently the implementation of up_cpu_index is done a bit lazily,
because it assumes hartid == cpu index, but this is not 100% accurate,
so it is still missing some logic.
---
arch/risc-v/src/common/riscv_cpuindex.c | 26 -----------
arch/risc-v/src/common/riscv_macros.S | 20 ++++++++
.../common/{riscv_cpuindex.c => riscv_mhartid.S} | 54 +++++-----------------
arch/risc-v/src/k210/Make.defs | 1 +
arch/risc-v/src/mpfs/Make.defs | 5 +-
arch/risc-v/src/qemu-rv/Make.defs | 1 +
6 files changed, 37 insertions(+), 70 deletions(-)
diff --git a/arch/risc-v/src/common/riscv_cpuindex.c
b/arch/risc-v/src/common/riscv_cpuindex.c
index 5f06c2ceca..c3ce34118b 100644
--- a/arch/risc-v/src/common/riscv_cpuindex.c
+++ b/arch/risc-v/src/common/riscv_cpuindex.c
@@ -30,37 +30,11 @@
#include <nuttx/irq.h>
#include "riscv_internal.h"
-#include "riscv_percpu.h"
/****************************************************************************
* Public Functions
****************************************************************************/
-/****************************************************************************
- * Name: riscv_mhartid
- *
- * Description:
- * Context aware way to query hart id
- *
- * Returned Value:
- * Hart id
- *
- ****************************************************************************/
-
-uintptr_t riscv_mhartid(void)
-{
-#ifdef CONFIG_ARCH_USE_S_MODE
- /* Kernel is in S-mode */
-
- return riscv_percpu_get_hartid();
-
-#else
- /* Kernel is in M-mode */
-
- return READ_CSR(mhartid);
-#endif
-}
-
/****************************************************************************
* Name: up_cpu_index
*
diff --git a/arch/risc-v/src/common/riscv_macros.S
b/arch/risc-v/src/common/riscv_macros.S
index 7a675ab262..76d43eab79 100644
--- a/arch/risc-v/src/common/riscv_macros.S
+++ b/arch/risc-v/src/common/riscv_macros.S
@@ -152,3 +152,23 @@
.endm
#endif /* !defined(CONFIG_SMP) && !defined(CONFIG_ARCH_USE_S_MODE) */
#endif /* CONFIG_ARCH_INTERRUPTSTACK > 15 */
+
+/****************************************************************************
+ * Name: riscv_mhartid
+ *
+ * Description:
+ * Context aware way to query hart id
+ *
+ * Returned Value:
+ * Hart id
+ *
+ ****************************************************************************/
+
+.macro riscv_mhartid out
+#ifdef CONFIG_ARCH_USE_S_MODE
+ csrr \out, CSR_SCRATCH
+ REGLOAD \out, RISCV_PERCPU_HARTID(\out)
+#else
+ csrr \out, mhartid
+#endif
+.endm
diff --git a/arch/risc-v/src/common/riscv_cpuindex.c
b/arch/risc-v/src/common/riscv_mhartid.S
similarity index 62%
copy from arch/risc-v/src/common/riscv_cpuindex.c
copy to arch/risc-v/src/common/riscv_mhartid.S
index 5f06c2ceca..0cfcfc256c 100644
--- a/arch/risc-v/src/common/riscv_cpuindex.c
+++ b/arch/risc-v/src/common/riscv_mhartid.S
@@ -1,5 +1,5 @@
/****************************************************************************
- * arch/risc-v/src/common/riscv_cpuindex.c
+ * arch/risc-v/src/common/riscv_mhartid.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
@@ -18,24 +18,22 @@
*
****************************************************************************/
+.file "riscv_mhartid.S"
+
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
-#include <stdint.h>
-
-#include <nuttx/arch.h>
-#include <nuttx/irq.h>
-
-#include "riscv_internal.h"
-#include "riscv_percpu.h"
+#include "riscv_macros.S"
/****************************************************************************
- * Public Functions
+ * Public Symbols
****************************************************************************/
+ .globl riscv_mhartid
+
/****************************************************************************
* Name: riscv_mhartid
*
@@ -47,39 +45,9 @@
*
****************************************************************************/
-uintptr_t riscv_mhartid(void)
-{
-#ifdef CONFIG_ARCH_USE_S_MODE
- /* Kernel is in S-mode */
+.type riscv_mhartid, function
- return riscv_percpu_get_hartid();
-
-#else
- /* Kernel is in M-mode */
-
- return READ_CSR(mhartid);
-#endif
-}
-
-/****************************************************************************
- * Name: up_cpu_index
- *
- * Description:
- * Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
- * corresponds to the currently executing CPU.
- *
- * Input Parameters:
- * None
- *
- * Returned Value:
- * An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
- * corresponds to the currently executing CPU.
- *
- ****************************************************************************/
+riscv_mhartid:
-#ifdef CONFIG_SMP
-int up_cpu_index(void)
-{
- return (int)riscv_mhartid();
-}
-#endif
+ riscv_mhartid a0
+ ret
diff --git a/arch/risc-v/src/k210/Make.defs b/arch/risc-v/src/k210/Make.defs
index 89bec1c201..39413b80db 100644
--- a/arch/risc-v/src/k210/Make.defs
+++ b/arch/risc-v/src/k210/Make.defs
@@ -39,6 +39,7 @@ CMN_CSRCS += riscv_misaligned.c
ifeq ($(CONFIG_SMP), y)
CMN_CSRCS += riscv_cpuindex.c riscv_cpupause.c riscv_cpustart.c
+CMN_ASRCS += riscv_mhartid.S
endif
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs
index 6b27e0eba8..66654a03e4 100755
--- a/arch/risc-v/src/mpfs/Make.defs
+++ b/arch/risc-v/src/mpfs/Make.defs
@@ -32,7 +32,10 @@ CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c
riscv_schedulesigaction.c
CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
CMN_CSRCS += riscv_mdelay.c riscv_udelay.c
CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c riscv_getnewintctx.c
-CMN_CSRCS += riscv_cpuindex.c riscv_doirq.c riscv_mtimer.c
+CMN_CSRCS += riscv_doirq.c riscv_mtimer.c
+
+# Specify ASM code within the common directory to be included
+CMN_ASRCS += riscv_mhartid.S
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
CMN_CSRCS += riscv_backtrace.c
diff --git a/arch/risc-v/src/qemu-rv/Make.defs
b/arch/risc-v/src/qemu-rv/Make.defs
index bc11bf5815..11a8cf93f4 100644
--- a/arch/risc-v/src/qemu-rv/Make.defs
+++ b/arch/risc-v/src/qemu-rv/Make.defs
@@ -38,6 +38,7 @@ CMN_CSRCS += riscv_exception.c riscv_getnewintctx.c
riscv_doirq.c
ifeq ($(CONFIG_SMP), y)
CMN_CSRCS += riscv_cpuindex.c riscv_cpupause.c riscv_cpustart.c
+CMN_ASRCS += riscv_mhartid.S
endif
ifeq ($(CONFIG_SCHED_BACKTRACE),y)
