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janc pushed a change to branch master
in repository https://gitbox.apache.org/repos/asf/mynewt-nimble.git.
from c337666 Removed an illogical check from npl_freertos_callout_reset
add 6df27f0 NimBLE host: Modify
jimmo commented on pull request #998:
URL: https://github.com/apache/mynewt-nimble/pull/998#issuecomment-878271358
> Yes, lets fix it in core and then resync here.
> In general I think we should simply start using uintptr where needed
(although mynewt was/is 32bit os only).
vrahane commented on pull request #441:
URL: https://github.com/apache/mynewt-newt/pull/441#issuecomment-878448471
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sjanc opened a new pull request #2640:
URL: https://github.com/apache/mynewt-core/pull/2640
repos/apache-mynewt-core/libc/baselibc/src/jrand48.c:8:29: error: argument 1
of type
‘short unsigned int[3]’ with mismatched bound [-Werror=array-parameter=]
8 | long jrand48(unsigned
sjanc opened a new pull request #999:
URL: https://github.com/apache/mynewt-nimble/pull/999
Those functions are expected to always consume txom.
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sjanc merged pull request #898:
URL: https://github.com/apache/mynewt-nimble/pull/898
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sjanc commented on a change in pull request #998:
URL: https://github.com/apache/mynewt-nimble/pull/998#discussion_r667912101
##
File path: porting/nimble/src/os_mempool.c
##
@@ -38,7 +38,8 @@
#define OS_MEMPOOL_TRUE_BLOCK_SIZE(mp)
OS_MEM_TRUE_BLOCK_SIZE(mp->mp_block_size)
vikrant-proxy opened a new pull request #440:
URL: https://github.com/apache/mynewt-newt/pull/440
Bootloader binaries seem to have moved to `app/@mcuboot`, which causes `mfg`
command to fail, see https://github.com/apache/mynewt-newt/issues/439. This PR
attempts to account for this
vrahane edited a comment on pull request #441:
URL: https://github.com/apache/mynewt-newt/pull/441#issuecomment-878454380
I think this change is reasonable, it is required for nrf53 netcore for
sure. Wonder if there is a way to make this mandatory somehow for BSPs with
dual core with
vikrant-proxy opened a new pull request #441:
URL: https://github.com/apache/mynewt-newt/pull/441
Chips with > 1 core, like `nrf53` have the second core mapped to a different
address space (not based at 0x0). This PR adds a base address field that can be
provided in the `mfg.yml` in an
sjanc commented on a change in pull request #986:
URL: https://github.com/apache/mynewt-nimble/pull/986#discussion_r667918856
##
File path: apps/blestress/src/tx_stress.c
##
@@ -848,6 +848,16 @@ tx_stress_9_gap_event(struct ble_gap_event *event, void
*arg)
{
ble_addr_t
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