[GitHub] [mynewt-core] apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify peripheral initialization
apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-585847157
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[GitHub] [mynewt-core] apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify peripheral initialization
apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-584705685
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[GitHub] [mynewt-core] apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify peripheral initialization
apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-584700967
## Style check summary
### Our coding style is
[here!](https://github.com/apache/mynewt-core/blob/master/CODING_STANDARDS.md)
hw/bsp/black_vet6/src/hal_bsp.c
```diff
@@ -66,46 +66,46 @@
/*
* Helper macros to build ADC data structures
*/
-#define STM32F4_DEFAULT_DMA_HANDLE(instance, channel, parent) {\
-.Instance = (instance),\
-.Init.Channel = (channel),\
-.Init.Direction = DMA_PERIPH_TO_MEMORY,\
-.Init.PeriphInc = DMA_PINC_DISABLE,\
-.Init.MemInc = DMA_MINC_ENABLE,\
-.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD,\
-.Init.MemDataAlignment = DMA_MDATAALIGN_WORD,\
-.Init.Mode = DMA_CIRCULAR,\
-.Init.Priority = DMA_PRIORITY_HIGH,\
-.Init.FIFOMode = DMA_FIFOMODE_DISABLE,\
-.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL,\
-.Init.MemBurst = DMA_MBURST_SINGLE,\
-.Init.PeriphBurst = DMA_PBURST_SINGLE,\
-.Parent = (parent),\
+#define STM32F4_DEFAULT_DMA_HANDLE(instance, channel, parent) { \
+.Instance = (instance), \
+.Init.Channel = (channel), \
+.Init.Direction = DMA_PERIPH_TO_MEMORY, \
+.Init.PeriphInc = DMA_PINC_DISABLE, \
+.Init.MemInc = DMA_MINC_ENABLE, \
+.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD, \
+.Init.MemDataAlignment = DMA_MDATAALIGN_WORD, \
+.Init.Mode = DMA_CIRCULAR, \
+.Init.Priority = DMA_PRIORITY_HIGH, \
+.Init.FIFOMode = DMA_FIFOMODE_DISABLE, \
+.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL, \
+.Init.MemBurst = DMA_MBURST_SINGLE, \
+.Init.PeriphBurst = DMA_PBURST_SINGLE, \
+.Parent = (parent), \
}
#define ADC_INIT_HANDLE(name, instance, dma_handle)
\
-ADC_HandleTypeDef (name) = {
\
-.Init = {
\
-.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2,
\
-.Resolution = ADC_RESOLUTION12b,
\
-.DataAlign = ADC_DATAALIGN_RIGHT,
\
-.ScanConvMode = DISABLE,
\
-.EOCSelection = DISABLE,
\
-.ContinuousConvMode = ENABLE,
\
-.NbrOfConversion = 1,
\
-.DiscontinuousConvMode = DISABLE,
\
-.NbrOfDiscConversion = 0,
\
-.ExternalTrigConv = ADC_SOFTWARE_START,
\
-.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE,
\
-.DMAContinuousRequests = ENABLE,
\
-},
\
-.Instance = (instance),
\
-.NbrOfCurrentConversionRank = 0,
\
-.DMA_Handle = (dma_handle),
\
-.Lock = HAL_UNLOCKED,
\
-.State = 0,
\
-.ErrorCode = 0,
\
-}
+ADC_HandleTypeDef (name) = { \
+.Init = { \
+.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2, \
+.Resolution = ADC_RESOLUTION12b, \
+.DataAlign = ADC_DATAALIGN_RIGHT, \
+.ScanConvMode = DISABLE, \
+.EOCSelection = DISABLE, \
+.ContinuousConvMode = ENABLE, \
+.NbrOfConversion = 1, \
+.DiscontinuousConvMode = DISABLE, \
+.NbrOfDiscConversion = 0, \
+.ExternalTrigConv = ADC_SOFTWARE_START, \
+.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE,\
+.DMAContinuousRequests = ENABLE, \
+},
[GitHub] [mynewt-core] apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify peripheral initialization
apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-584604730
## Style check summary
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[GitHub] [mynewt-core] apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify peripheral initialization
apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-584597198
## Style check summary
### Our coding style is
[here!](https://github.com/apache/mynewt-core/blob/master/CODING_STANDARDS.md)
hw/bsp/nucleo-f303k8/src/hal_bsp.c
```diff
@@ -41,7 +41,7 @@
.suc_pin_rx = MYNEWT_VAL(UART_0_RX),
.suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
.suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
-.suc_pin_af = GPIO_AF7_USART2,
+.suc_pin_af = GPIO_AF7_USART2,
.suc_irqn = USART2_IRQn,
};
#endif
@@ -55,7 +55,7 @@
.suc_pin_rx = MYNEWT_VAL(UART_1_RX),
.suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
.suc_pin_cts = MYNEWT_VAL(UART_1_CTS),
-.suc_pin_af = GPIO_AF7_USART1,
+.suc_pin_af = GPIO_AF7_USART1,
.suc_irqn = USART1_IRQn,
};
#endif
```
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[GitHub] [mynewt-core] apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify peripheral initialization
apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-584284096
## Style check summary
### Our coding style is
[here!](https://github.com/apache/mynewt-core/blob/master/CODING_STANDARDS.md)
hw/mcu/stm/stm32_common/src/stm32_periph.c
```diff
@@ -98,11 +98,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi0_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi0_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_0_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_0_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_0_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_0_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_0_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_0_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_0_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_0_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
@@ -111,11 +111,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi1_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi1_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_1_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_1_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_1_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_1_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_1_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_1_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_1_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_1_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
@@ -124,11 +124,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi2_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi2_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_2_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_2_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_2_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_2_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_2_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_2_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_2_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_2_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
@@ -137,11 +137,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi3_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi3_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_3_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_3_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_3_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_3_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_3_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_3_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_3_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_3_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
```
hw/bsp/b-l072z-lrwan1/src/hal_bsp.c
```diff
@@ -86,7 +86,7 @@
#endif
#if ((MYNEWT_VAL(SPI_1_SLAVE) || MYNEWT_VAL(SPI_1_MASTER)) && \
-MYNEWT_VAL(SPI_1_CUSTOM_CFG))
+MYNEWT_VAL(SPI_1_CUSTOM_CFG))
const struct stm32_hal_spi_cfg os_bsp_spi1_cfg = {
#if (MYNEWT_VAL(LORA_NODE) && (MYNEWT_VAL(SX1276_SPI_IDX) == 1))
.ss_pin = MYNEWT_VAL(SX1276_SPI_CS_PIN),
```
hw/bsp/nucleo-f103rb/src/hal_bsp.c
```diff
@@ -38,43 +38,43 @@
#if MYNEWT_VAL(UART_0)
const struct stm32_uart_cfg os_bsp_uart0_cfg = {
-.suc_uart = USART2,
-.suc_rcc_reg = >APB1ENR,
-.suc_rcc_dev = RCC_APB1ENR_USART2EN,
-.suc_pin_tx = MYNEWT_VAL(UART_0_TX),
-.suc_pin_rx = MYNEWT_VAL(UART_0_RX),
-.suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
-.suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
+.suc_uart = USART2,
+.suc_rcc_reg = >APB1ENR,
+.suc_rcc_dev = RCC_APB1ENR_USART2EN,
+.suc_pin_tx = MYNEWT_VAL(UART_0_TX),
+.suc_pin_rx = MYNEWT_VAL(UART_0_RX),
+.suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
+.suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
.suc_pin_remap_fn = LL_GPIO_AF_DisableRemap_USART2,
-.suc_irqn = USART2_IRQn,
+.suc_irqn = USART2_IRQn,
};
#endif
#if MYNEWT_VAL(UART_1)
const struct stm32_uart_cfg os_bsp_uart1_cfg = {
-.suc_uart = USART1,
-.suc_rcc_reg = >APB2ENR,
-.suc_rcc_dev = RCC_APB2ENR_USART1EN,
-.suc_pin_tx = MYNEWT_VAL(UART_1_TX),
-.suc_pin_rx = MYNEWT_VAL(UART_1_RX),
-.suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
-.suc_pin_cts = MYNEWT_VAL(UART_1_CTS),
+.suc_uart = USART1,
+.suc_rcc_reg = >APB2ENR,
+.suc_rcc_dev = RCC_APB2ENR_USART1EN,
+.suc_pin_tx = MYNEWT_VAL(UART_1_TX),
+.suc_pin_rx = MYNEWT_VAL(UART_1_RX),
+.suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
+.suc_pin_cts =
[GitHub] [mynewt-core] apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify peripheral initialization
apache-mynewt-bot removed a comment on issue #2186: [WIP] stm32: unify
peripheral initialization
URL: https://github.com/apache/mynewt-core/pull/2186#issuecomment-584228303
## Style check summary
### Our coding style is
[here!](https://github.com/apache/mynewt-core/blob/master/CODING_STANDARDS.md)
hw/mcu/stm/stm32_common/src/stm32_periph.c
```diff
@@ -94,11 +94,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi0_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi0_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_0_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_0_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_0_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_0_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_0_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_0_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_0_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_0_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
@@ -107,11 +107,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi1_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi1_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_1_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_1_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_1_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_1_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_1_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_1_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_1_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_1_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
@@ -120,11 +120,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi2_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi2_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_2_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_2_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_2_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_2_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_2_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_2_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_2_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_2_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
@@ -133,11 +133,11 @@
extern const struct stm32_hal_spi_cfg os_bsp_spi3_cfg;
#else
static const struct stm32_hal_spi_cfg os_bsp_spi3_cfg = {
-.sck_pin = MYNEWT_VAL(SPI_3_PIN_SCK),
-.mosi_pin = MYNEWT_VAL(SPI_3_PIN_MOSI),
-.miso_pin = MYNEWT_VAL(SPI_3_PIN_MISO),
-.ss_pin = MYNEWT_VAL(SPI_3_PIN_SS),
-.irq_prio = 2,
+.sck_pin = MYNEWT_VAL(SPI_3_PIN_SCK),
+.mosi_pin = MYNEWT_VAL(SPI_3_PIN_MOSI),
+.miso_pin = MYNEWT_VAL(SPI_3_PIN_MISO),
+.ss_pin = MYNEWT_VAL(SPI_3_PIN_SS),
+.irq_prio = 2,
};
#endif
#endif
```
hw/bsp/b-l072z-lrwan1/src/hal_bsp.c
```diff
@@ -86,7 +86,7 @@
#endif
#if ((MYNEWT_VAL(SPI_1_SLAVE) || MYNEWT_VAL(SPI_1_MASTER)) && \
-MYNEWT_VAL(SPI_1_CUSTOM_CFG))
+MYNEWT_VAL(SPI_1_CUSTOM_CFG))
const struct stm32_hal_spi_cfg os_bsp_spi1_cfg = {
#if (MYNEWT_VAL(LORA_NODE) && (MYNEWT_VAL(SX1276_SPI_IDX) == 1))
.ss_pin = MYNEWT_VAL(SX1276_SPI_CS_PIN),
```
hw/bsp/nucleo-f103rb/src/hal_bsp.c
```diff
@@ -38,43 +38,43 @@
#if MYNEWT_VAL(UART_0)
const struct stm32_uart_cfg os_bsp_uart0_cfg = {
-.suc_uart = USART2,
-.suc_rcc_reg = >APB1ENR,
-.suc_rcc_dev = RCC_APB1ENR_USART2EN,
-.suc_pin_tx = MYNEWT_VAL(UART_0_TX),
-.suc_pin_rx = MYNEWT_VAL(UART_0_RX),
-.suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
-.suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
+.suc_uart = USART2,
+.suc_rcc_reg = >APB1ENR,
+.suc_rcc_dev = RCC_APB1ENR_USART2EN,
+.suc_pin_tx = MYNEWT_VAL(UART_0_TX),
+.suc_pin_rx = MYNEWT_VAL(UART_0_RX),
+.suc_pin_rts = MYNEWT_VAL(UART_0_RTS),
+.suc_pin_cts = MYNEWT_VAL(UART_0_CTS),
.suc_pin_remap_fn = LL_GPIO_AF_DisableRemap_USART2,
-.suc_irqn = USART2_IRQn,
+.suc_irqn = USART2_IRQn,
};
#endif
#if MYNEWT_VAL(UART_1)
const struct stm32_uart_cfg os_bsp_uart1_cfg = {
-.suc_uart = USART1,
-.suc_rcc_reg = >APB2ENR,
-.suc_rcc_dev = RCC_APB2ENR_USART1EN,
-.suc_pin_tx = MYNEWT_VAL(UART_1_TX),
-.suc_pin_rx = MYNEWT_VAL(UART_1_RX),
-.suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
-.suc_pin_cts = MYNEWT_VAL(UART_1_CTS),
+.suc_uart = USART1,
+.suc_rcc_reg = >APB2ENR,
+.suc_rcc_dev = RCC_APB2ENR_USART1EN,
+.suc_pin_tx = MYNEWT_VAL(UART_1_TX),
+.suc_pin_rx = MYNEWT_VAL(UART_1_RX),
+.suc_pin_rts = MYNEWT_VAL(UART_1_RTS),
+.suc_pin_cts =
