Re: [RFC] Add "riscv-" for embedded cross toolchains

2018-07-03 Thread Jim Wilson
On Tue, Jul 3, 2018 at 10:54 AM, Liviu Ionescu  wrote:
>> I think Liviu's argument has a flaw.  While it is true that both riscv32 and 
>> risvc64 can emit both 32-bit and 64-bit code, they have different defaults.  
>> riscv32 emits 32-bit by default, and riscv64 emits 64-bit by default.  That 
>> is a property we lose if we allow riscv, because it won't be obvious if 
>> 32-bit or 64-bit code is the default.
>
> The defaults you mention apply to the Linux compilers, which are not the 
> topic of this thread.

Ben's latest patch suggestion adds riscv-linux support, which makes
linux concerns relevant to this thread.

> To minimise uncertainty, the embedded cross compilers should not provide such 
> defaults, the `-march` option should be mandatory, preferably the `-mabi` 
> option too.

This would break the embedded cross compilers for most people.  I
don't think it would be wise to do this.  I'm not aware of any other
GNU toolchain that works this way.  There is always a default
architecture and ABI.

Jim

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Re: [RFC] Add "riscv-" for embedded cross toolchains

2018-07-03 Thread Liviu Ionescu



> On 3 Jul 2018, at 20:41, Jim Wilson  wrote:
> 
> I think Liviu's argument has a flaw.  While it is true that both riscv32 and 
> risvc64 can emit both 32-bit and 64-bit code, they have different defaults.  
> riscv32 emits 32-bit by default, and riscv64 emits 64-bit by default.  That 
> is a property we lose if we allow riscv, because it won't be obvious if 
> 32-bit or 64-bit code is the default.

The defaults you mention apply to the Linux compilers, which are not the topic 
of this thread.

To minimise uncertainty, the embedded cross compilers should not provide such 
defaults, the `-march` option should be mandatory, preferably the `-mabi` 
option too. 

It would be good if the RISC-V compiler would implement this.


Regards,

Liviu


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Re: [RFC] Add "riscv-" for embedded cross toolchains

2018-07-03 Thread Jim Wilson

On 07/03/2018 03:29 AM, Ben Elliston wrote:

+riscv-linuxriscv-unknown-linux-gnu


Accepting riscv-linux isn't OK.  That will cause complications.  Though 
I'm not sure if that can be easily avoided if we allow riscv-elf.


There are no plans for any tools to accept riscv- as a CPU, so adding 
support for this to config.sub isn't very useful.


Personally, I think Palmer's suggestion of mapping riscv to riscv32 is 
the best compromise.  I realize that Liviu isn't happy about that, but 
we can't do much about that.


Most GNU tools accept --program-transform-name as a configure option, so 
it is easy to strip off the 32 or 64 in the program name at install time 
if you wish.  That should solve Liviu's problem.


I think Liviu's argument has a flaw.  While it is true that both riscv32 
and risvc64 can emit both 32-bit and 64-bit code, they have different 
defaults.  riscv32 emits 32-bit by default, and riscv64 emits 64-bit by 
default.  That is a property we lose if we allow riscv, because it won't 
be obvious if 32-bit or 64-bit code is the default.


Jim

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Re: [RFC] Add "riscv-" for embedded cross toolchains

2018-07-03 Thread Liviu Ionescu



> On 3 Jul 2018, at 13:29, Ben Elliston  wrote:
> 
> OK, how about this? This patch makes everything uniform

for my embedded toolchain it seems ok.

however please note that I did not try to update my `riscv-none-embed-` build 
scripts to use this new structure; actually my scripts are still based on the 
7.x version of the RISC-V repositories, so they might need some adjustments.

but I guess I can manage this.


regards,

Liviu


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Re: [RFC] Add "riscv-" for embedded cross toolchains

2018-07-03 Thread Ben Elliston
OK, how about this? This patch makes everything uniform (see test
cases below for an illustration of behaviour):

diff --git a/config.sub b/config.sub
index 072700f..c95acc6 100755
--- a/config.sub
+++ b/config.sub
@@ -625,7 +625,7 @@ case $basic_machine in
| powerpc | powerpc64 | powerpc64le | powerpcle \
| pru \
| pyramid \
-   | riscv32 | riscv64 \
+   | riscv | riscv32 | riscv64 \
| rl78 | rx \
| score \
| sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[234]eb | sheb | 
shbe | shle | sh[1234]le | sh3ele \
@@ -752,7 +752,7 @@ case $basic_machine in
| powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* \
| pru-* \
| pyramid-* \
-   | riscv32-* | riscv64-* \
+   | riscv-* | riscv32-* | riscv64-* \
| rl78-* | romp-* | rs6000-* | rx-* \
| sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* 
| sheb-* | shbe-* \
| shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \
@@ -1125,12 +1125,6 @@ case $basic_machine in
ps2)
basic_machine=i386-ibm
;;
-   riscv)
-   basic_machine=riscv32-unknown
-   ;;
-   riscv-*)
-   basic_machine=`echo "$basic_machine" | sed 's/^riscv/riscv32/'`
-   ;;
rm[46]00)
basic_machine=mips-siemens
;;
diff --git a/testsuite/config-sub.data b/testsuite/config-sub.data
index 7ad1f76..5ab1807 100644
--- a/testsuite/config-sub.data
+++ b/testsuite/config-sub.data
@@ -422,11 +422,11 @@ riscv64-elf   
riscv64-unknown-elf
 riscv64-hcos   riscv64-unknown-hcos
 riscv64-linux  riscv64-unknown-linux-gnu
 riscv64riscv64-unknown-none
-riscv-company-elf  riscv32-company-elf
-riscv-company-hcos riscv32-company-hcos
-riscv-elf  riscv32-unknown-elf
-riscv-linuxriscv32-unknown-linux-gnu
-riscv  riscv32-unknown-none
+riscv-company-elf  riscv-company-elf
+riscv-company-hcos riscv-company-hcos
+riscv-elf  riscv-unknown-elf
+riscv-linuxriscv-unknown-linux-gnu
+riscv  riscv-unknown-none
 rl78-linux rl78-unknown-linux-gnu
 rl78   rl78-unknown-none
 rx-linux   rx-unknown-linux-gnu


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