Am Donnerstag, den 17.01.2008, 12:55 +0100 schrieb Torsten Duwe:
On Wednesday 16 January 2008, Stefan Reinauer wrote:
* Uwe Hermann [EMAIL PROTECTED] [080116 16:03]:
This doesn't look generic enough(?) Where does TTYS0_BASE come from?
Agreed.
TTYS0_BASE seems to be the standard name used
On Mon, Jan 21, 2008 at 10:07:02AM +0800, bxshi wrote:
OK, here is the output file .
bxshi
superiotool r
Found Winbond W83627DHG (id=0xa0, rev=0x23) at 0x4e
Register dump:
idx 02 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f
val ff a0 23 ff 00 40 00 40 ff 50 80 02 00 03 21 00 ff
Author: uwe
Date: 2008-01-21 16:24:22 +0100 (Mon, 21 Jan 2008)
New Revision: 3067
Modified:
trunk/util/flashrom/Makefile
trunk/util/flashrom/flashrom.8
trunk/util/flashrom/flashrom.c
Log:
This patch adds version information to flashrom. Because 'v' and 'V'
are already in use, the patch
Author: uwe
Date: 2008-01-21 16:24:22 +0100 (Mon, 21 Jan 2008)
New Revision: 3067
Modified:
trunk/util/flashrom/Makefile
trunk/util/flashrom/flashrom.8
trunk/util/flashrom/flashrom.c
Log:
This patch adds version information to flashrom. Because 'v' and 'V'
are already in use, the patch
On Mon, Jan 21, 2008 at 08:32:24AM +0100, Ulf Jordan wrote:
This patch adds version information to flashrom. Because 'v' and 'V'
are already in use, the patch uses 'R' (for release) and, of course,
'--version'.
Signed-off-by: Bernhard Walle [EMAIL PROTECTED]
Acked-by: Ulf Jordan
Hello!
As in the thread Re: [coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F)
there was added support for writing/reading lager SPI chips than 512kB i had
a look on the current flashrom code, in svn revision 3067.
I recogniced that the MX25L8005 calls the same function than the
On Mon, Jan 21, 2008 at 04:42:04PM +0100, Uwe Hermann wrote:
See patch.
We keep forgetting to update all the sources of information, let's
drop some and only use one location where we document stuff
Ack.
(mostly wiki).
Not so sure.
I would prefer to have these docs in the tarball as
Carl-Daniel Hailfinger wrote:
3 of 5 targets in v3 fail to compile:
- adl/msm800sev
- amd/norwich
- artecgroup/dbe61
While none of these targets worked on real hardware, we were at least
able to compile them and could keep the code mostly warning-free to give
later porters a good start.
On Mon, Jan 21, 2008 at 05:45:40PM +0100, Peter Stuge wrote:
We keep forgetting to update all the sources of information, let's
drop some and only use one location where we document stuff
Ack.
(mostly wiki).
Not so sure.
I would prefer to have these docs in the tarball as well.
On Mon, Jan 14, 2008 at 03:29:51PM +0100, Uwe Hermann wrote:
On Mon, Jan 14, 2008 at 05:46:29AM -0500, Corey Osgood wrote:
I know ;) Uwe, do you have a 440bx board you can try this on? Mine has
Yep, will do.
OK, here's my status report, there seem to be some issues.
I tried the current svn
On Jan 21, 2008 12:34 PM, Stefan Reinauer [EMAIL PROTECTED] wrote:
I recommend u16 device, u16 address. The address can be up to 10 bits
as I understand it
on some versions of smbus. Am I wrong on this however?
I thought a device always has to be struct device? No?
I'm having a slow
ron minnich wrote:
On Jan 21, 2008 12:34 PM, Stefan Reinauer [EMAIL PROTECTED] wrote:
I recommend u16 device, u16 address. The address can be up to 10 bits
as I understand it
on some versions of smbus. Am I wrong on this however?
I thought a device always has to be struct device? No?
On Jan 21, 2008 12:42 PM, Marc Jones [EMAIL PROTECTED] wrote:
I looked at the smbus spec (it is public) and didn't see anything about
10bit address.
http://smbus.org/specs/
SMBus addresses are 7 binary
bits long and are conventionally expressed as 4 bits followed by 3 bits
followed by the
ron minnich wrote:
On Jan 21, 2008 10:12 AM, Marc Jones [EMAIL PROTECTED] wrote:
Patches appreciated.
Hints:
- artecgroup/dbe61 first failed in r527 with undefined reference to
'spd_read_byte'
- adl/msm800sev and amd/norwich first failed in r537 with conflicting
types for 'spd_read_byte',
On Jan 14, 2008 5:14 PM, Uwe Hermann [EMAIL PROTECTED] wrote:
Hi,
here's a repost of a patch from last year which has not yet been
comitted. See discussion starting at
http://www.coreboot.org/pipermail/coreboot/2007-December/028076.html
for details.
The code works well enough to be
On Mon, Jan 21, 2008 at 01:42:21PM -0700, Marc Jones wrote:
I looked at the smbus spec (it is public) and didn't see anything about
10bit address.
http://smbus.org/specs/
SMBus addresses are 7 binary
bits long and are conventionally expressed as 4 bits followed by 3 bits
followed by the
ron minnich wrote:
On Jan 21, 2008 1:14 PM, Marc Jones [EMAIL PROTECTED] wrote:
===
--- LinuxBIOSv3.orig/include/lib.h 2008-01-11 15:52:52.0 -0700
+++ LinuxBIOSv3/include/lib.h 2008-01-11 16:04:12.0 -0700
On 21.01.2008 17:15, Harald Gutmann wrote:
Hello!
As in the thread Re: [coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F)
there was added support for writing/reading lager SPI chips than 512kB i had
a look on the current flashrom code, in svn revision 3067.
I recogniced that the
Author: hailfinger
Date: 2008-01-22 00:55:08 +0100 (Tue, 22 Jan 2008)
New Revision: 3068
Modified:
trunk/util/flashrom/spi.c
Log:
Omitting the wait for SPI ready when there is no data to be read, e.g.
readcnt==0 saves 10 seconds with the unconditional 10us delay, reducing
programming time for
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