Myles Watson escribió:
On Fri, Dec 18, 2009 at 8:41 AM, Knut Kujat kn...@gap.upv.es
mailto:kn...@gap.upv.es wrote:
Never mind about the memory corruption. PNP: 002e.3 has some
resources that aren't fixed, so the allocator is trying to
allocate them. In the SuperIO code where
Hi,
attached patch makes coreboot load VSA from CBFS on amd/gx2. It's very
similar to the recent change to amd/lx (3 weeks ago), in fact, it's a
copypaste from there.
Build tested, but I don't have the hardware around to test operation,
but the lx variant was tested.
Most notably, the gx2 code
Patrick Georgi wrote:
attached patch makes coreboot load VSA from CBFS on amd/gx2.
Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de
Acked-by: Peter Stuge pe...@stuge.se
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Author: oxygene
Date: 2009-12-21 13:32:29 +0100 (Mon, 21 Dec 2009)
New Revision: 4986
Modified:
trunk/src/cpu/amd/model_gx2/vsmsetup.c
Log:
Make coreboot load VSA from CBFS on amd/gx2.
You have to convert the VSA bios image to ELF using the following
commands (assuming i386/32bit binutils, if
Hi,
attached patch allows to specify the size of a newly created cbfs image
to be stated in kilobytes or megabytes. Usage is
cbfstool coreboot.rom create 1048576 coreboot.bootblock
cbfstool coreboot.rom create 1024k coreboot.bootblock
cbfstool coreboot.rom create 1m coreboot.bootblock
to get an
Author: oxygene
Date: 2009-12-21 14:50:37 +0100 (Mon, 21 Dec 2009)
New Revision: 4987
Modified:
trunk/src/arch/i386/Makefile.inc
trunk/util/cbfstool/cbfstool.c
Log:
Allow user to specify the size of a newly created cbfs image
to be stated in kilobytes or megabytes. Usage is
cbfstool
What's interesting about your 750ms is that it meets the requirement I saw
at a FOSDEM talk that the boot time needed for an auto computer was 800ms,
so that users could see blinky lights in less than one second. You're
showing very impressive performance here for an x86.
You've also raised the
#154: Flashing BIOSes from Fujitsu/Siemens is not supported
---+
Reporter: johannesoberm...@… | Owner: carldani
Type: enhancement | Status: new
Priority: trivial
seems to me we could use the great work of kevin to do a boot-in-one-second
cloudbook: http://en.wikipedia.org/wiki/CloudBook to work with these guys:
http://www.zoho.com/
Of course, I'm still not so sure I want my stuff in the cloud, but it's
certainly all the rage ...
Wouldn't it be neat if
Am 18.12.2009 19:50, schrieb Myles Watson:
As long as the user doesn't touch it, GENERATE_ was set by default as
long as the board has HAVE_* set. What this patch did was make it so
that the user can't build without ACPI tables. I don't think that is
what's wanted. Now to remove the
Author: stepan
Date: 2009-12-21 16:09:01 +0100 (Mon, 21 Dec 2009)
New Revision: 4988
Modified:
trunk/util/cbfstool/cbfstool.c
Log:
make strcmp happy by including string.h (trivial)
Signed-off-by: Stefan Reinauer ste...@coresystems.de
Acked-by: Stefan Reinauer ste...@coresystems.de
On Mon, Dec 21, 2009 at 3:27 AM, Knut Kujat kn...@gap.upv.es wrote:
but I haven't changed anything but inserting some printk_spew into void
dev_initialize(void) to see where exactly jumps the exception out.
Did you try increasing the stack size? When you inserted the printk
statements, were
This looks like it was an interesting task. I had some questions and
comments from previous fast-POST exercises:
On Mon, Dec 21, 2009 at 12:44 AM, Kevin O'Connor ke...@koconnor.net wrote:
* cpu appears to start running around 350ms
Do you have a scope at all?. The only way to know this number
Myles Watson escribió:
On Mon, Dec 21, 2009 at 3:27 AM, Knut Kujat kn...@gap.upv.es
mailto:kn...@gap.upv.es wrote:
but I haven't changed anything but inserting some printk_spew into
void dev_initialize(void) to see where exactly jumps the
exception out.
Did you try
On Mon, Dec 21, 2009 at 9:15 AM, Knut Kujat kn...@gap.upv.es wrote:
Myles Watson escribió:
On Mon, Dec 21, 2009 at 3:27 AM, Knut Kujat kn...@gap.upv.es wrote:
but I haven't changed anything but inserting some printk_spew into void
dev_initialize(void) to see where exactly jumps the
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
1) there is a flag for uncompressed module 0x90 instead of 0x80 dunno why
2) if the module size in rom 0x some bytes before the structure are used
as size, the second number looks like crc maybe.
It turns out the extra header is there for all
Add VIA VT82C686A/VT82C686B support to superiotool.
The patch as-is will likely not detect the Super I/O due to missing PCI
functionality in superiotool, but you might get lucky.
This adds an additional requirement to superiotool: libpci. I have made
the PCI code conditional on PCI_SUPPORT for
Hi,
The VGA BIOS is through int15 getting LCD panel ID. Then the VBIOS call
int15's Get LCD panel ID.
The panel ID is selection by switch.
This function is reference AMD RS690 ASIC Family BIOS Developer's
Guide.
Thanks.
Signed-off-by: Libra Li libra...@technexion.com
Index:
On Mon, Dec 21, 2009 at 10:29:54AM -0500, Tom Sylla wrote:
This looks like it was an interesting task. I had some questions and
comments from previous fast-POST exercises:
On Mon, Dec 21, 2009 at 12:44 AM, Kevin O'Connor ke...@koconnor.net wrote:
* cpu appears to start running around 350ms
Hi Guys!
Can someone help me to get coreboot support for my board MS-6702E?
Thank you very much!
Greetings
freeman2411
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On Mon, Dec 21, 2009 at 6:15 PM, Libra Li librali1...@gmail.com wrote:
Hi,
The VGA BIOS is through int15 getting LCD panel ID. Then the VBIOS call
int15's Get LCD panel ID.
The panel ID is selection by switch.
This function is reference AMD RS690 ASIC Family BIOS Developer's
It's a vt8237r thing - basically I need to add:
It is PSON gating. RTC Power Well registers must be avoided to access until the
gating is complete. SMBus happen to be power well register ;)
Kevin, I think we need some fix with the timeout maybe? Definetely for the AT
PSU. They need to
Hi Marc Jones,
1.
+typedef struct {
+int mask[256];
+int (*intXX_handler[256])(struct eregs *regs);
+}interrupt_handlers;
The mainboard_interrupt_handlers need modification if the structure
is not needed.
2.
+
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