Re: [coreboot] Dualbios on GA-MA770-UD3

2010-04-25 Thread xdrudis
On Sat, Apr 24, 2010 at 08:26:45PM +0200, Patrick Georgi wrote: Am 24.04.2010 19:43, schrieb xdrudis: They might just use a watchdog: - BIOS 1 sets a flag - BIOS 1 configures the watchdog to trigger when it's not touched within 2 seconds (or whatever). watchdog would reboot the system then

[coreboot] [patch]remove sb600 legacy code

2010-04-25 Thread Zheng Bao
The device number of SATA SB700 is 0x11, while the one of SB600 is 0x12. We changed almost associated code when we ported but overlooked some. Some legacy of SB600 are also fixed. Signed-off-by: Zheng Bao zheng@amd.com Index: src/mainboard/amd/mahogany/dsdt.asl

Re: [coreboot] [patch] Rename the intermediate file created by iasl

2010-04-25 Thread Patrick Georgi
Am 25.04.2010 12:41, schrieb Zheng Bao: For the mainboard with AMD Family 10, if we make clean and make again, it will fail. why? After make clean, .c files created by iasl are still left in the build folder, it will match the rule of $(obj)/%.o: $(obj)/%.c $(obj)/config.h @printf CC

Re: [coreboot] [patch]remove sb600 legacy code

2010-04-25 Thread Stefan Reinauer
On 4/25/10 12:39 PM, Zheng Bao wrote: The device number of SATA SB700 is 0x11, while the one of SB600 is 0x12. We changed almost associated code when we ported but overlooked some. Some legacy of SB600 are also fixed. Signed-off-by: Zheng Bao zheng@amd.com mailto:zheng@amd.com

Re: [coreboot] Dualbios on GA-MA770-UD3

2010-04-25 Thread Peter Stuge
xdrudis wrote: They might just use a watchdog: Ok. I'm rereading the link Gigabyte gave me, Please read the US Patent. //Peter -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] [commit] r5490 - in trunk/src/mainboard/amd: mahogany mahogany/acpi mahogany_fam10 mahogany_fam10/acpi tilapia_fam10 tilapia_fam10/acpi

2010-04-25 Thread repository service
Author: zbao Date: Sun Apr 25 13:53:09 2010 New Revision: 5490 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5490 Log: The device number of SATA SB700 is 0x11, while the one of SB600 is 0x12. We changed almost associated code when we ported but overlooked some. Some legacy of SB600

[coreboot] [commit] r5491 - in trunk/src/mainboard/amd: mahogany mahogany_fam10 tilapia_fam10

2010-04-25 Thread repository service
Author: zbao Date: Sun Apr 25 13:57:21 2010 New Revision: 5491 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5491 Log: Trivial. The comment also need to modify. Signed-off-by: Zheng Bao zheng@amd.com Acked-by: Zheng Bao zheng@amd.com Modified:

[coreboot] [commit] r5492 - in trunk/src: mainboard/asus/a8v-e_se mainboard/gigabyte/m57sli northbridge/amd/amdk8 northbridge/via/cn400 northbridge/via/cx700 northbridge/via/vx800 southbridge/amd/rs78

2010-04-25 Thread repository service
Author: stepan Date: Sun Apr 25 15:54:30 2010 New Revision: 5492 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5492 Log: zero warnings days Signed-off-by: Stefan Reinauer ste...@coresystems.de Acked-by: Stefan Reinauer ste...@coresystems.de Modified:

[coreboot] build service results for r5492

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer stepan checked in revision 5492 to the coreboot repository. This caused the following changes: Change Log: zero warnings days Signed-off-by: Stefan Reinauer ste...@coresystems.de Acked-by: Stefan Reinauer

[coreboot] [commit] r5493 - in trunk/src: drivers/ati/ragexl mainboard/intel/jarrell mainboard/intel/xe7501devkit southbridge/amd/amd8111 southbridge/amd/cs5536 southbridge/broadcom/bcm5785 southbridg

2010-04-25 Thread repository service
Author: stepan Date: Sun Apr 25 16:37:18 2010 New Revision: 5493 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5493 Log: no warnings days. Signed-off-by: Stefan Reinauer ste...@coresystems.de Acked-by: Stefan Reinauer ste...@coresystems.de Modified:

[coreboot] build service results for r5493

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer stepan checked in revision 5493 to the coreboot repository. This caused the following changes: Change Log: no warnings days. Signed-off-by: Stefan Reinauer ste...@coresystems.de Acked-by: Stefan Reinauer

[coreboot] [commit] r5494 - in trunk/src: mainboard/asus/m2v-mx_se southbridge/via/k8t890

2010-04-25 Thread repository service
Author: ruik Date: Sun Apr 25 17:21:18 2010 New Revision: 5494 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5494 Log: Following patch changes the K8M890 VGA handling. It reverts the framebuffer size to option based (similar what Uwe did) and also it uses GFXUMA to handle the

[coreboot] build service results for r5494

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer ruik checked in revision 5494 to the coreboot repository. This caused the following changes: Change Log: Following patch changes the K8M890 VGA handling. It reverts the framebuffer size to option based

[coreboot] [commit] r5495 - trunk/src/northbridge/via/cx700

2010-04-25 Thread repository service
Author: oxygene Date: Sun Apr 25 20:05:42 2010 New Revision: 5495 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5495 Log: Only do complete VGA init if a VGABIOS was found and installed. Signed-off-by: Patrick Georgi patrick.geo...@coresystems.de Acked-by: Stefan Reinauer

[coreboot] [commit] r5496 - in trunk/src: mainboard/asus/a8n_e mainboard/gigabyte/m57sli mainboard/msi/ms7260 mainboard/msi/ms9282 mainboard/msi/ms9652_fam10 mainboard/nvidia/l1_2pvv mainboard/supermi

2010-04-25 Thread repository service
Author: stepan Date: Sun Apr 25 20:06:32 2010 New Revision: 5496 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5496 Log: try to unify timing initialization across those boards that need it... Signed-off-by: Stefan Reinauer ste...@coresystems.de Acked-by: Stefan Reinauer

[coreboot] build service results for r5495

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer oxygene checked in revision 5495 to the coreboot repository. This caused the following changes: Change Log: Only do complete VGA init if a VGABIOS was found and installed. Signed-off-by: Patrick Georgi

[coreboot] build service results for r5496

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer stepan checked in revision 5496 to the coreboot repository. This caused the following changes: Change Log: try to unify timing initialization across those boards that need it... Signed-off-by: Stefan Reinauer

[coreboot] [commit] r5497 - in trunk/src: mainboard/asus/a8v-e_se mainboard/asus/m2v-mx_se southbridge/via southbridge/via/k8t890

2010-04-25 Thread repository service
Author: ruik Date: Sun Apr 25 22:24:09 2010 New Revision: 5497 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5497 Log: Fix the the build of r5494 on Asus A8V-E SE. The K8M890 and K8T890 were not treated separately until now. Fix it. Hope self ack is OK, compiled tested locally.

[coreboot] build service results for r5497

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer ruik checked in revision 5497 to the coreboot repository. This caused the following changes: Change Log: Fix the the build of r5494 on Asus A8V-E SE. The K8M890 and K8T890 were not treated separately until

[coreboot] [commit] r5498 - in trunk/src: arch/i386/include/arch arch/i386/init arch/i386/lib arch/i386/llshell cpu/x86/lapic cpu/x86/smm include/cpu/x86

2010-04-25 Thread repository service
Author: stepan Date: Sun Apr 25 22:42:02 2010 New Revision: 5498 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5498 Log: drop arch/asm.h and arch/intel.h and create cpu/x86/post_code.h (which could at some time hold global post code definitions, too) Signed-off-by: Stefan Reinauer

[coreboot] build service results for r5498

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer stepan checked in revision 5498 to the coreboot repository. This caused the following changes: Change Log: drop arch/asm.h and arch/intel.h and create cpu/x86/post_code.h (which could at some time hold global

[coreboot] [commit] r5499 - in trunk/src: arch/i386/init cpu/intel/car cpu/intel/model_106cx cpu/intel/model_6ex cpu/intel/model_6fx cpu/via/car include/cpu/x86

2010-04-25 Thread repository service
Author: stepan Date: Sun Apr 25 23:43:29 2010 New Revision: 5499 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5499 Log: a single place for the romstage stack for copy_and_run. geode lx and amd opteron don't use this yet. Signed-off-by: Stefan Reinauer ste...@coresystems.de Acked-by:

[coreboot] [commit] r5500 - trunk/src/northbridge/via/cx700

2010-04-25 Thread repository service
Author: stepan Date: Sun Apr 25 23:44:33 2010 New Revision: 5500 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5500 Log: cx700 int15 handler rework. Int15 handler needs to provide the correct ram clock to the vga bios or there be dragons. Signed-off-by: Stefan Reinauer

[coreboot] build service results for r5499

2010-04-25 Thread coreboot information
Dear coreboot readers! This is the automatic build system of coreboot. The developer stepan checked in revision 5499 to the coreboot repository. This caused the following changes: Change Log: a single place for the romstage stack for copy_and_run. geode lx and amd opteron don't use this yet.

[coreboot] [PATCH] WIP - suspend/resume on AMD64 using CBMEM

2010-04-25 Thread Rudolf Marek
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Hello, Attached patch implements again suspend/resume without reserved memory. The RAMBASE-RAMTOP is backuped to cbmem as ID_SUSPEND/RESUME and then before jumping to OS restore orig mem data again. I have a question regarding the size of HIGH

[coreboot] [patch] Rename the intermediate file created by iasl

2010-04-25 Thread Bao, Zheng
For the mainboard with AMD Family 10, if we make clean and make again, it will fail. why? After make clean, .c files created by iasl are still left in the build folder, it will match the rule of $(obj)/%.o: $(obj)/%.c $(obj)/config.h @printf CC $(subst

Re: [coreboot] [patch] DDR3 support of AMD Family 10

2010-04-25 Thread bari
Thank you very much for the DDR3 coreboot support. Are there any coreboot plans at AMD to support G34 with Opteron 6000's, SR56x0 and SP5100, Dinar or Drachma, etc.? http://www.amd.com/us/products/server/processors/6000-series-platform/pages/6000-series-platform.aspx -Bari Bao, Zheng wrote: