Hi again,
So far I had no luck reproducing it. Can you provide output of following command
please:
sudo setpci -s 14.0 8.b
It should print number like 11, 12, 13 or 14.
This is in fact your SB revision. I need it to check the errata sheet. Also
please provide the clock source information
On 01/21/2014 10:39 AM, Rudolf Marek wrote:
Hi again,
So far I had no luck reproducing it. Can you provide output of following
command please:
thanks ruik for looking into this. i'll get back to you with the
requested info as soon as i can. yesterday was MLK day, and i'm not
feelin too hot
On Tuesday, January 14, 2014 03:50:52 AM Peter Link wrote:
Since the commercial availability of Coreboot is a big deal for many people,
could someone in the project put up a quick list of vendor-supplied (no
hacking required) Coreboot machines, starting with the Chromebooks?
There ain't much
I've been following and promoting Coreboot for a few years now, but never have
had a computer with one, since I'm not technical enough to do it myself.
I understand that the newer crop of Chromebooks has support for Coreboot, but
then I still see many references to flashing it yourself.
Hi coreboot!
I finally sent off my order to seeed and have received the boards back.
It turns out, that over the last year (and a half) seeed actually
improved their processes and have even narrower minimals, which is great
for this board.
Anyway, I took some pics and the uploaded the
On Monday, January 20, 2014 02:59:24 PM you wrote:
Recently came across this. Provided is a coreboot ROM and payload, with
instructions on how to generate the segfault. I won't have time to look into
this anytime soon.
ML server didn't like first email. segfault generating files are at [1].
6 matches
Mail list logo
