Re: [coreboot] Coreboot image and seabios payload with debug symbols

Hi Zoran Please find responses: [1] When you do refer to "Intel system debugger", do you refer to INTEL ITP2 debugger, with Blue Box XDP 60 pin HW connector (http://m.eet.com/media/1073715/JTAG_101_fig5.jpg)? This is Intel® ITP-XDP3.

[coreboot] ASUS KFSN4-DRE (K8) Automated Test Failure [master]

The ASUS KFSN4-DRE (K8) fails verification for branch master as of commit a486af46b2a5d49b05bfc89a876b5c800eadbe69 The following tests failed: BOOT_FAILURE Commits since last successful test: a486af4 soc/qualcomm/ipq40xx: Add coreboot Table entry for serial console 4df1e0a google/gale: Enable

[coreboot] New Defects reported by Coverity Scan for coreboot

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 10 new defect(s) introduced to coreboot found with Coverity Scan. 120 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New

Re: [coreboot] Coreboot image and seabios payload with debug symbols

Hello Mayuri, Few questions, may I? [1] When you do refer to *"**Intel system debugger",* do you refer to INTEL ITP2 debugger, with Blue Box XDP 60 pin HW connector ( http://m.eet.com/media/1073715/JTAG_101_fig5.jpg)? [2] For which CPU/SoC/platform you would like to use [1]? [3] Seems that you

[coreboot] Coreboot image and seabios payload with debug symbols

Hi I want to use Intel system debugger to do coreboot source level debugging. So I need below. Can you please help me in this? To debug your software using source code you need to load debug information that is used to map the program in target memory to the original source files. To do this