Re: [coreboot] Help on setting clock speed in coreboot

First thing is to get serial output as there will probably be other hurdles before the display works. I used coreboot bayleybay as the basis and it had the port mentioned (pin BD14 (GPIO_S0_SC[57]))) setup for debug output and the baud rate of 115200. Minnowboard may be different. Also, I had

Re: [coreboot] Help on setting clock speed in coreboot

Thanks. We tried 115200, but it didn't work. We checked TTL levels and tried to match, but no luck. Are you using PCU UART (same as minnowboard) or anything different? From: Naveed Ghori [mailto:naveed.gh...@dti.com.au] Sent: 11 July 2016 18:17 To: Mayuri Tendulkar

Re: [coreboot] Help on setting clock speed in coreboot

Hi, Garbage usually means baud rate. Did you try 115200baud? If you are still getting garbage I would recommend seeing it on the scope and making sure voltage levels are fine. The output by default would be TTL level and may need to be converted. I have used some TTL (1.8V if I remember

[coreboot] Help on setting clock speed in coreboot

Hi Team I have a customized board based on Intel valley island design. Reference design uses Intel Baytrail processor E3825, while my design is using E3845. I am customizing coreboot for this E3845, but getting just garbage on coreboot, so not able to debug where it is stuck. When I add

Re: [coreboot] PAYLOAD_SEGMENT_BSS not getting cleared in selfboot.c

On Mon, Jul 11, 2016 at 3:19 PM, Aaron Durbin wrote: > Hello, > > I have a historical question regarding the current selfboot.c > implementation surrounding PAYLOAD_SEGMENT_BSS. > > Documentation/cbfs.txt indicates that PAYLOAD_SEGMENT_BSS should be cleared: > >

[coreboot] New Defects reported by Coverity Scan for coreboot

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 55 new defect(s) introduced to coreboot found with Coverity Scan. 94 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New

[coreboot] PAYLOAD_SEGMENT_BSS not getting cleared in selfboot.c

Hello, I have a historical question regarding the current selfboot.c implementation surrounding PAYLOAD_SEGMENT_BSS. Documentation/cbfs.txt indicates that PAYLOAD_SEGMENT_BSS should be cleared: "PAYLOAD_SEGMENT_BSS0x20535342 The memory speicfied by the segment should be zeroed" And we