Re: [coreboot] iPXE as payload?

On 03/19/2017 01:46 AM, Idwer Vollering wrote: 2017-03-19 1:24 GMT+01:00 Gert Menke : Hi Martin, Hi Idwer, thanks for your reply. On 2017-03-19 00:59, Martin Roth wrote: This will build iPXE option rom into the coreboot.rom file. Which is exactly what I do not want.

Re: [coreboot] iPXE as payload?

2017-03-19 1:24 GMT+01:00 Gert Menke : > Hi Martin, > > thanks for your reply. > > On 2017-03-19 00:59, Martin Roth wrote: >> >> This will build iPXE option rom into the coreboot.rom file. > > > Which is exactly what I do not want. > It consumes a few seconds on every boot, which is

Re: [coreboot] Conventions for describing flash memory layouts

On 18/03/2017, Patrick 'P. J.' McDermott wrote: > On 2017-03-18 at 18:00, Sam Kuper wrote: >> The page >> https://www.coreboot.org/index.php?title=Board:lenovo/x201=24709#Flashing >> says: >> >> > The flash memory in the X201 is divided into roughly 4 parts: >> > >> > -

Re: [coreboot] iPXE as payload?

Hi Martin, thanks for your reply. On 2017-03-19 00:59, Martin Roth wrote: This will build iPXE option rom into the coreboot.rom file. Which is exactly what I do not want. It consumes a few seconds on every boot, which is totally unnecessary, because I very rarely want to boot over network.

Re: [coreboot] iPXE as payload?

Hi Gert, Yes, it's possible. In the coreboot payload menu, select "[ ] Add a PXE ROM" This opens up a new menu "PXE Options --->" In that menu, the top option is: "PXE ROM to use (Add an existing PXE ROM image) --->" select that, and switch to "( ) Build and add an iPXE ROM" Select the

Re: [coreboot] How come the community meeting is hosted by proprietary software?

Additionally, the meeting software needs to work well for everyone, pretty much anywhere in the world. The coreboot community is an amazingly diverse group. So the meeting method needs to have a way to work well in pretty much any OS you can think of, or there needs to be an alternate method of

Re: [coreboot] Conventions for describing flash memory layouts

On 2017-03-18 at 18:00, Sam Kuper wrote: > The page > https://www.coreboot.org/index.php?title=Board:lenovo/x201=24709#Flashing > says: > > > The flash memory in the X201 is divided into roughly 4 parts: > > > > - Descriptor (12K) > > - ME firmware (5M-12K) > > - Rewriteable flash (3M-96K) > > -

[coreboot] iPXE as payload?

Hi, I would like to use iPXE as a secondary payload (rather than as option rom). The advantage would be that iPXE would not need to be loaded on every boot, but I could still choose it in the SeaBIOS boot menu when I want to use it. Is this possible? If so, how? Thanks Gert -- coreboot

Re: [coreboot] How come the community meeting is hosted by proprietary software?

Nobody is stopping anyone from implementing and letting us try something open. I think it's great. I would love to be able to use it. But some rules apply: o a lot of us have full time jobs and (in my case at least) a skill set that does not include competence/interest in hacking on meeting

Re: [coreboot] How come the community meeting is hosted by proprietary software?

Stefan Reinauer wrote: > > > > I never tried the web interface. > > > > > > We did, it failed us. > > > > What problems did people have with mumble-web, and where was the > > websockets server running, relative to the mumble server? > > It was actually your mumble server. I didn't have

[coreboot] Conventions for describing flash memory layouts

The page https://www.coreboot.org/index.php?title=Board:lenovo/x201=24709#Flashing says: > The flash memory in the X201 is divided into roughly 4 parts: > > - Descriptor (12K) > - ME firmware (5M-12K) > - Rewriteable flash (3M-96K) > - Locked bootblock (96K) I guess that "K" refers to kibibytes

Re: [coreboot] coreboot community meeting minutes for March 16th, 2017

On Sat, Mar 18, 2017 at 10:13 AM Peter Stuge wrote: > > > Oh Ron, don't be so lazy. ;) > > > that's not my reason. I just proposed the (const == var) form on another project I'm on and it turned into a real storm, and reasonable arguments were presented about why it's not that

Re: [coreboot] coreboot community meeting minutes for March 16th, 2017

Thanks for sending out minutes! Martin Roth wrote: > * How do we feel about changing the coding style to move constants in > comparisons to the left side? if (0 == x) instead of (x == 0) >- The argument for doing this was that this style finds errors in any > environment >- Ron is very

[coreboot] checkpatch: Question regarding asmlinkage and storage class

Dear checkpatch developers, The coreboot project started using checkpatch.pl, and now some effort is going into fixing issues pointed out by `checkpatch.pl`. The file `src/arch/x86/acpi_s3.c` in coreboot contains the code below. ```    205 void (*acpi_do_wakeup)(uintptr_t vector, u32

Re: [coreboot] RYZen single APU design

Hello Qmaster, Taiidan, Thank you for the replies. Last day (March 16th, 2017, Thursday) of Embedded World 2017 I took the trip from Munich to Nuremberg on my own dime (to visit EW 2017), and to speak with some people/companies I supported previously (while being "Intel-er", you name it, the