Re: [coreboot] (libre) Add-on cards for getting higher SSD throughput on the KGPE-D16?

2018-03-01 Thread Daniel Kulesz via coreboot
Thank you, Timothy. > > (2) get the PIKE 2008 card => will SATA3 work without non-free firmware? > > No. > Ok, too bad. I thought the non-free firmware would only be needed for the SAS part, but I assume the LSI controller handles both SAS and SATA. > > (3) put in some PCIe SATA3 card => any

Re: [coreboot] (libre) Add-on cards for getting higher SSD throughput on the KGPE-D16?

2018-03-01 Thread Alberto Bursi
On 03/01/2018 09:20 PM, Timothy Pearson wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > On 03/01/2018 01:36 PM, Daniel Kulesz via coreboot wrote: >> Hi, >> >> >> (3) put in some PCIe SATA3 card => any recommended chips that respect >> freedom? > There are very few. You can try

[coreboot] ARMv8 MMU changes

2018-03-01 Thread Julius Werner
Hi Patrick et. al., Continuing from what you said on IRC, let's please discuss this before you spend time to work on any major changes to the ARMv8 MMU code. I don't think that should be necessary (especially changing the GRANULE_SIZE which is a complication I'd really like to avoid having), and

Re: [coreboot] (libre) Add-on cards for getting higher SSD throughput on the KGPE-D16?

2018-03-01 Thread Timothy Pearson
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 03/01/2018 01:36 PM, Daniel Kulesz via coreboot wrote: > Hi, > > after plugging a rather newish 2,5 SATA SSD to my KGPE-D16, I realized that > the regular SATA ports connected to the SP5100 on this board can only handle > SATA2, limiting

[coreboot] (libre) Add-on cards for getting higher SSD throughput on the KGPE-D16?

2018-03-01 Thread Daniel Kulesz via coreboot
Hi, after plugging a rather newish 2,5 SATA SSD to my KGPE-D16, I realized that the regular SATA ports connected to the SP5100 on this board can only handle SATA2, limiting transfer speeds to max. 300 MB/s. I thought about various options what I could do now: (1) try to get the PIKE 9230 card

Re: [coreboot] Coreboot + Depthcharge

2018-03-01 Thread Peter Stuge
Marshall Dawson wrote: >1. You can skip this step in your instructions. Instead, when running >make menuconfig, look in Chipset / ChromeOS and select "Build for >ChromeOS". This should cause Depthcharge to appear as a payload option. I think this is a design issue in coreboot that

Re: [coreboot] Coreboot + Depthcharge

2018-03-01 Thread Marshall Dawson
Hello Mark, 1. You can skip this step in your instructions. Instead, when running make menuconfig, look in Chipset / ChromeOS and select "Build for ChromeOS". This should cause Depthcharge to appear as a payload option. You can find the reason for this is in

Re: [coreboot] Coreboot + Depthcharge

2018-03-01 Thread Peter Stuge
Mark Wylde wrote: > 1. Depthcharge is not a payload. The `payloads/Kconfig` file > doesn't have an option for Depthcharge. However if you add it and > run menuconfig, selecting the new payload, everything works great > (well apart from issues 2) coreboot very much intentionally does not limit

Re: [coreboot] Issue report

2018-03-01 Thread Persmule
Hi all, Later I noticed that it is reported from #coreboot that linux needs "acpi=noirq" to boot properly 在 2018年03月01日 18:08, Persmule 写道: > > Hi Heymans, > > Today I performed a test on my x230, which shows that commit > d2d2aef6a3222af909183fb96dc7bc908fac3cd4 ( >