Re: [coreboot] PC Engines apu2 boot regression

On Fri, May 4, 2018 at 8:22 PM, Aaron Durbin wrote: > On Fri, May 4, 2018 at 11:16 AM, Kyösti Mälkki > wrote: >> On Fri, May 4, 2018 at 7:19 PM, Kyösti Mälkki >> wrote: >>> On Fri, May 4, 2018 at 6:37 PM, Aaron Durbin

Re: [coreboot] PC Engines apu2 boot regression

> > My current guess is AP CPUs do not see initialised memory for > _car_region_start .. _end. That region is set up using fixed MTRRs in > low memory and probably not synced between cores so early in romstage. > Kyosti, I haven't kept a close watch on CAR changes in the other AMD systems,

Re: [coreboot] FSP 2.0 headers in coreboot

On Fri, May 4, 2018 at 3:20 PM, Youness Alaoui wrote: > Hi, > > I've just pushed a commit for review on gerrit > (https://review.coreboot.org/#/c/coreboot/+/26108/) and I'm hoping to > open the discussion here on whether the public coreboot code should > have the

[coreboot] FSP 2.0 headers in coreboot

Hi, I've just pushed a commit for review on gerrit (https://review.coreboot.org/#/c/coreboot/+/26108/) and I'm hoping to open the discussion here on whether the public coreboot code should have the FSP headers that match the public FSP headers or if they should match the 'google fsp' headers. My

Re: [coreboot] Why do we have FSP-S

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 05/04/2018 01:08 PM, Zaolin wrote: > You forgot Cavium Thunder X SoC support, Stefan ;) > > Finally coreboot supports it and there are no blobs > > on this platform. It's not exactly what I'd call modern desktop or server class, though :-)

Re: [coreboot] Why do we have FSP-S

You forgot Cavium Thunder X SoC support, Stefan ;) Finally coreboot supports it and there are no blobs on this platform. On 04.05.2018 20:01, Stefan Reinauer wrote: > * Timothy Pearson [180501 04:58]: >> -BEGIN PGP SIGNED MESSAGE- >> Hash: SHA256 >> >>

Re: [coreboot] Why do we have FSP-S

Hi Kyösti, That's a great post-mortem, thanks for writing it up! I didn't mean to imply that binary PI is a great example of how to do things, I just think Bruce's explanation is useful for answering Ivan's question of why companies don't simply open their code. As you point out binary blobs

Re: [coreboot] Why do we have FSP-S

* Timothy Pearson [180501 04:58]: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA256 > > All the ARM64 boards I've seen that are desktop or higher class ship > with AMI UEFI and AMI BMC. Plus they contain their own magic blobs, > some akin to the ME. ARM64 is

Re: [coreboot] PC Engines apu2 boot regression

On Fri, May 4, 2018 at 11:16 AM, Kyösti Mälkki wrote: > On Fri, May 4, 2018 at 7:19 PM, Kyösti Mälkki wrote: >> On Fri, May 4, 2018 at 6:37 PM, Aaron Durbin wrote: Any idea what can be result of such weird behavior?

Re: [coreboot] PC Engines apu2 boot regression

On Fri, May 4, 2018 at 7:19 PM, Kyösti Mälkki wrote: > On Fri, May 4, 2018 at 6:37 PM, Aaron Durbin wrote: >>> >>> Any idea what can be result of such weird behavior? >> My current guess is AP CPUs do not see initialised memory for _car_region_start

Re: [coreboot] DDR1 K8 boot broken too (was: Re: PC Engines apu2 boot regression)

On Fri, May 4, 2018 at 10:01 AM, Jonathan A. Kollasch wrote: > On Fri, May 04, 2018 at 05:23:40PM +0200, Piotr Król wrote: >> Hi Aaron, >> I tried to boot PC Engines apu2 on recent master branch and discovered >> that it not boot. Bisection points to: >> >> 60320182d011

Re: [coreboot] PC Engines apu2 boot regression

On Fri, May 4, 2018 at 6:37 PM, Aaron Durbin wrote: > On Fri, May 4, 2018 at 9:23 AM, Piotr Król wrote: >> Hi Aaron, >> I tried to boot PC Engines apu2 on recent master branch and discovered >> that it not boot. Bisection points to: >> >> 60320182d011

[coreboot] DDR1 K8 boot broken too (was: Re: PC Engines apu2 boot regression)

On Fri, May 04, 2018 at 05:23:40PM +0200, Piotr Król wrote: > Hi Aaron, > I tried to boot PC Engines apu2 on recent master branch and discovered > that it not boot. Bisection points to: > > 60320182d011 console: only allow console messages after initialization > > It is hard to believe that this

Re: [coreboot] PC Engines apu2 boot regression

On Fri, May 4, 2018 at 9:23 AM, Piotr Król wrote: > Hi Aaron, > I tried to boot PC Engines apu2 on recent master branch and discovered > that it not boot. Bisection points to: > > 60320182d011 console: only allow console messages after initialization > > It is hard to

[coreboot] PC Engines apu2 boot regression

Hi Aaron, I tried to boot PC Engines apu2 on recent master branch and discovered that it not boot. Bisection points to: 60320182d011 console: only allow console messages after initialization It is hard to believe that this change cause AGESA reset loop, but I checked 3 times. After applying