Good day Zvika:
Looks typical the configuration
But for DIMM Density to get this information you should run the command I told
you yesterday or check the memory chip datasheet.
About the 0xCE postcode you need to set the microcode (or the correct one, or
the correct path) in menuconfig.
Jose.
Hi Jose, All,
According to the following outputs, it seems my target has SPD EEPROM.
If I understand correctly from your reply, I should modify only:
DRAM Type: DDR3
DRAM Speed: 1333 MT/s
DIMM 0 Enable: Enabled
DIMM 1 Enable: Disabled
DIMM_DWidth: x8
DIMM_Density: ??? (Default is 2Gbit)
Hi Aron,
I am not able to get the cbmem timestamps. I am using cbmem utility to find the
timestamps.
$ . /cbmem -t
The above command gives the following error.
Failed to mmap /dev/mem : Operation not permitted
Could you please help on this?
Thanks & Regards,
Antony
From: Aaron Durbin
Hi Aron,
I have tried giving iomem=relaxed to the kernel command line. But still I am
getting the same error.
This time I tried with verbose option and the output is below
$ ./cbmem -V -t
Looking for coreboot table at 0 1048576 bytes.
Mapping 1MB of physical memory at 0x0 (requested 0x0).
Can you please check with patch: https://review.coreboot.org/c/coreboot/+/29108
Make sure that mainboard devicetree.cb has PmTimerDisabled=0 for TCO to work.
Thanks,
Naresh G Solanki
On Wed, Oct 10, 2018 at 11:07 PM Matt DeVillier
wrote:
>
> greetings! I'm trying to enable WDT support for
What I want to do is fix the SR5690/SR56xx capabilities list to reflect
what is actually documented rather than what currently functions.
It is lacking ARI, ATS and a few other things although it has ACS I am
not sure exactly what enables it at the moment either coreboot or
quirked in linux.
--
Hi Everyone!
Sorry for the 2 weeks late reply, I've read your responses, but I've
been too busy and dealing with stuff and haven't had/taken the time to
reply but your input was very much appreciated and not ignored!
One thing to note is that this week will be my last week at Purism as
I'm going
On Mon, Oct 15, 2018 at 6:42 AM Antony AbeePrakash X V
wrote:
>
> Hi Aron,
>
>
>
> I have tried giving iomem=relaxed to the kernel command line. But still I am
> getting the same error.
>
>
>
> This time I tried with verbose option and the output is below
>
> $ ./cbmem -V -t
>
>
>
> Looking for
Hi,
There are two things here.
1. System fails to boot i.e., hangs
2. FPGA's connected to root port are not detected in FW/OS
For problem 1, can you give data on where exactly it hangs?, Is it in
OS or FW ?, Can you provide kernel/coreboot log, port 80 dump when it
hangs.
For problem 2, Can
Am Fr., 12. Okt. 2018 um 10:15 Uhr schrieb Nico Huber :
>
> On 10/11/18 11:29 AM, Christian Gmeiner wrote:
> > During the last weeks I found the root cause of my problem - PCIe
> > spread spectrum
> >
> > Our FPGAs need a stable 100MHz PCIE clock to work. The used FSP config
> > thing looked
> >
Zvika:
In my experience with my Baytrail system I can tell you my system is "really"
memory down because has soldered memory chips on the motherboard BUT has also a
soldered SPD memory so, if keep "Enable Memory Down = Disabled" in BCT the
system fetch memory timings from SPD so, no need to
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