glad it was useful! Its not easy to follow as its not a full writeup, like
i said yours is a lot better for people to follow. Steps are way more
clearer.
Thanks for the link pointer, you are right, it moved formats in later
kernels. The hex needed for each chip is now split out into
Hi,
Ha, I think I actually read that post - someone might have shared it with
me when I first started poking at this. I found that it was hard to follow,
especially starting with zero knowledge around BIOSes, but it definitely
got me on the right track.
And I'll take a look at the VSSC table
Good writeup!
While completely achieving the objective, there is also a shorter version
here which has less steps, but aimed at the heads user. Basically the way I
did it for heads was to ifdtool -D a normal build to 16MB then just extract
the IFD and use that to rebuild coreboot.
Hi all-
I wrote up an article (or, more like a step-by-step guide) on how to resize
the BIOS chip from 8MB to 16MB.
This is particularly handy for people (like myself) who want more space for
payloads.
This was done on an X210, but theoretically it should work fine on other
platforms as well, as
Which board are you testing with? Picasso support is still undergoing
heavy development and we are working on getting parity with the
chromiumos fork:
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/master:src/third_party/coreboot-zork/
On Sun, May 3, 2020 at 9:28 AM Zheng Bao
Hi again,
A while I ago I announced my intent to do a new coreboot
release. This is slated to happen next Monday, so we're now at
the "~1 week prior to release" point of our release checklist (at
https://doc.coreboot.org/releases/checklist.html).
So as a reminder: Please test the devices you
6 matches
Mail list logo
