[coreboot] events from GPIO in ACPI

I know why it didn't work. For GPIO8 it should be: 'Method(_L18, 0, NotSerialized)' instead of: 'Method(_L08, 0, NotSerialized)' I don't know why but I heard that gpio in acpi have to be with offset 0x10. Now it works. Chris -- coreboot mailing list: coreboot@coreboot.org

[coreboot] events from GPIO in ACPI

I have PPT chipset and I want to implement GPIO events from GPIO8.my configuration in devicetree.cb:gpi8_routing = 0x02gpe0_en = 0x0016configuration in gpio.h:.gpio8 = GPIO_MODE_GPIOgpio8 = GPIO_DIR_INPUTgpio8 = GPIO_LEVEL_HIGHgpio8 = GPIO_INVERTmy example in

[coreboot] Smart Battery on desktop board

Does anyone know what I need to do in coreboot to add support for Smart Battery for desktop board? Chris -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

[coreboot] Errors in Memtest86 with 4 or 8GB memory

I have a problem on Intel DQ77KB board. I have two the same boards and on every board Memtest86 reports a problem at 2990.8MB. That problem occur only if I use 4 or 8GB memory. With 2GB memory everything is OK. What may be causing errors in Test2 Address test, own address, Parallel in

[coreboot] Errors in Memtest86 with 4 or 8GB memory

I have a problem on Intel DQ77KB board. I use Coreboot with FSP and Seabios as a payload. I have two the same boards and on every board Memtest86 reports a problem at 2990.8MB. That problem occur only if I use 4 or 8GB memory. With 2GB memory everything is OK. What may be causing errors in Test2

[coreboot] Coreboot for DQ77KB

Hello, My name is Chris. I would like to adjust the coreboot to my DQ77KB board. For payload I used seabios. I managed to reach point when OS starts but I have a problem with Intel ME PCI devices (ME1, ME2, KT, IDE-R). A device manager in Windows7 reports an error 10 or 12 with these