Hi, adding this section:
register "lpc_ioe" = "LPC_IOE_SUPERIO_2E_2F | LPC_IOE_COMA_EN |
LPC_IOE_COMB_EN | LPC_IOE_EC_4E_4F"
to devicetree.cb solved problem.
Thanks!
пт, 9 сент. 2022 г. в 20:17, Nico Huber :
> Hello Roman,
>
> On 09.09.22 17:48, roman perepelitsin wrote:
> > I use coreboot for A
Hello Roman,
On 09.09.22 17:48, roman perepelitsin wrote:
> I use coreboot for ApolloLake CPU (Atom). We have SuperIO WB83627-DHG chip
> on carrier board. LPC enabled, POST codes work normal. But I can't get
> access to SIO under Linux (via port 0x2e). Superiotool can't find chip.
> Also, I have C
2 matches
Mail list logo