Re: [coreboot] SPI clock rate

2011-07-05 Thread Juhana Helovuo
Andreas Galauner wrote: So, I had the idea of developing a small Board which contains a USB port and an SPI flash. I first thought about emulating the SPI flash completely by an AVR, but I think the clock rates of the SPI bus are too high to do this. My new approach is a SPI flash which resides

[coreboot] SPI clock rate

2011-07-04 Thread Andreas Galauner
Hello everybody, I recently started to discover this great project you have here. I want to play with it a bit and port it to an AMD E-350 Motherboard (Sapphire Pure Fusion Mini E-350 - what a name...) I have at home in my spare time. Now I don't think that the development work is much fun, when

Re: [coreboot] SPI clock rate

2011-07-04 Thread Tom Sylla
Hello Andreas, Your ideas sound pretty good, but here are a couple of ideas that might make your life easier (and cheaper). I found some high-res pictures of your board on the web, and it looks like that board has a footprint for a SPI programming header (labelled SPI1, between USB1 and the SPI

Re: [coreboot] SPI clock rate

2011-07-04 Thread Peter Stuge
Peter Stuge wrote: you may want to look at the preliminary USB protocol document that me and Stefan Tauner have been working on. http://titanpad.com/x8M9ZvNeMN //Peter -- coreboot mailing list: coreboot@coreboot.org http://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] SPI clock rate

2011-07-04 Thread Andreas Galauner
On 7/5/11 2:25 AM, Peter Stuge wrote: Andreas Galauner wrote: I had the idea of developing a small Board which contains a USB port and an SPI flash. Sure. Or just follow Tom's tip and wire a second SPI bus master directly onto the mainboard. Yep, I just found the pinheader. Seems to be

Re: [coreboot] SPI clock rate

2011-07-04 Thread Peter Stuge
Andreas Galauner wrote: Yep, I just found the pinheader. Seems to be 1.27x1.27mm. I also created a support ticket for the pinout on Sapphire's website. It would be nice if they give that to me, but I really doubt it. Did you check that it's not documented in the manual already? I'll try to

Re: [coreboot] SPI clock rate

2011-07-04 Thread Andreas Galauner
On 7/5/11 3:02 AM, Peter Stuge wrote: Andreas Galauner wrote: Yep, I just found the pinheader. Seems to be 1.27x1.27mm. I also created a support ticket for the pinout on Sapphire's website. It would be nice if they give that to me, but I really doubt it. Did you check that it's not