Hi all,
during debugging of qemu-armv7 I found that coreboot performs memcpy to
ROMSTAGE_BASE area. This is in src/arch/armv7/memcpy.S:
3: PLD(pld [r1, #124] )
4: ldr8w r1, r3, r4, r5, r6, r7, r8, ip, lr, abort=20f
subsr2, r2, #32
The ROMSTAGE on ARM is expected to be SRAM. When you know the SRAM
address for a given mainboard, you need to set it up in Kconfig for
*just* that mainboard.
Nice work, I think you're getting close!
ron
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coreboot mailing list: coreboot@coreboot.org
On Sat, Aug 16, 2014 at 01:15:05PM -0700, ron minnich wrote:
The ROMSTAGE on ARM is expected to be SRAM. When you know the SRAM
address for a given mainboard, you need to set it up in Kconfig for
*just* that mainboard.
Nice work, I think you're getting close!
Thanks :)
Meanwhile I was able
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