On Thu, Mar 29, 2018 at 3:16 PM Nico Huber wrote:
> On 29.03.2018 23:58, ron minnich wrote:
> > believe it or not that code runs on coreboot simulator, hardware, and
> qemu,
>
> What is `coreboot simulator`?
>
>
>
the 8086 one in yabel.
So here's what I think is going on.
you're
On 29.03.2018 23:58, ron minnich wrote:
> believe it or not that code runs on coreboot simulator, hardware, and qemu,
What is `coreboot simulator`?
> and gets a different answer on each.
Same binary and same processor (e.g. 32-bit protected) mode?
Without knowing what your assembler translated
believe it or not that code runs on coreboot simulator, hardware, and qemu,
and gets a different answer on each.
On Thu, Mar 29, 2018 at 12:54 PM Nico Huber wrote:
> On 29.03.2018 20:25, ron minnich wrote:
> > I have the following code:
> >
> > movl $0x12345678, %eax
> > movl
On 29/03/2018 21:25, ron minnich wrote:
> I have the following code:
>
> movl $0x12345678, %eax
> movl $0x, %ebx
> movb $0x10, %cl
> shrdw %ebx, %eax
>
> quiz: what's the value of %ax after this instruction?
Given 'w', correct notation for the last instruction should be
shrdw %bx, %ax
?
On 29.03.2018 20:25, ron minnich wrote:
> I have the following code:
>
> movl $0x12345678, %eax
> movl $0x, %ebx
> movb $0x10, %cl
> shrdw %ebx, %eax
If I had to assemble it, I would have refuse it... *w with 32-bit
registers? how should that work?
Though, after reading a little about
I have the following code:
movl $0x12345678, %eax
movl $0x, %ebx
movb $0x10, %cl
shrdw %ebx, %eax
quiz: what's the value of %ax after this instruction?
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
6 matches
Mail list logo