[coreboot] display a picture using libpayload fuctions

Hello I wanna build a payload using libpayload (Lpgcc). I wanna dsiplay a picture . Is there a function in libpayload doing this ? thanks ᐧ -- coreboot mailing list: coreboot@coreboot.org https://www.coreboot.org/mailman/listinfo/coreboot

Re: [coreboot] SeaBIOS with native graphics initialization?

Thanks, unfortunately, it didn't work :( I guess something is not wrong, although it's not completely broken - while when I should see SeaBIOS I can see only a turned off screen, after a few seconds my OS loads, so I still can use software flash. Can you look at my configs and write what is

Re: [coreboot] SeaBIOS with native graphics initialization?

I should also mention that although I have CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT now, when I had it on previously, the result was about the same, except that before booting OS the screen was on (but it didn't display anything). On 06/02/2016 20:09, Piotr Kubaj wrote: > Thanks, > > unfortunately,

[coreboot] New on blogs.coreboot.org: [GSOC] Panic Room, week #1

A new post titled "[GSOC] Panic Room, week #1" has been published on the coreboot blog. Find the full post at http://blogs.coreboot.org/blog/2016/06/02/gsoc-panic-room-week-1/ Who are you? Hello everyone, I’m Antonello Dettori (avengerf12 on IRC) and I’m the student currently working on improving

Re: [coreboot] Discussion about dynamic PCI MMIO size on x86

Hello to all, If I correctly remember: PCIe configuration space addressing consists of 3 parts: bus (8 bits), device (5 bits) and function (3 bits). This gives in total 8+5+3= 16 bits, thus 2^16 (65536). With additional 256 bytes legacy, gives maximum of 16MB of configuration address space (just

Re: [coreboot] Discussion about dynamic PCI MMIO size on x86

Another Kconfig option? How many people will really understand what it means and whether to use it? Has just reserving 2 GiB as a hard and fast rule hurt anyone yet? thanks ron On Fri, Jun 3, 2016 at 11:25 PM Patrick Rudolph wrote: > On 2016-06-03 05:41 PM, Aaron Durbin

Re: [coreboot] Discussion about dynamic PCI MMIO size on x86

On 2016-06-03 05:41 PM, Aaron Durbin via coreboot wrote: > On Fri, Jun 3, 2016 at 7:04 AM, Patrick Rudolph wrote: >> Hello, >> I want to start a discussion about PCI MMIO size that hit me a couple of >> times using coreboot. >> I'm focused on Intel Sandybridge, but I guess