Re: [coreboot] SMI handler for fsp_broadwell_de

Fsp_broadwell_de do not implement the SMI support, but you may refer to soc/Broadwell as both are Intel architecture chipset. The SMI support can be done purely in coreboot, but need to touch FSP. / YoRK From: coreboot [mailto:coreboot-boun...@coreboot.org] On Behalf Of Watzlavick, Robert L

[coreboot] SMI handler for fsp_broadwell_de

I want to experiment with an SMI handler on the Camelback Mountain CRB (Xeon D-1500) but it appears that the fsp_broadwell_de changes removed SMM support. I'm browsing the coreboot-4.4 release. Was there a reason it was removed? It shows up in the soc/intel/Broadwell area so I suppose I

[coreboot] Will coreboot work on my laptop?

Hello everyone, I have a HP stream 11 x360 laptop. It has the following outputs performing the commands listed in coreboot FAQ: [ifoolb@192 ~]$ lspci -tvnn -[:00]-+-00.0 Intel Corporation Atom Processor Z36xxx/Z37xxx Series SoC Transaction Register [8086:0f00] +-02.0 Intel

[coreboot] Building Intel SoC Apollo Lake with DDR3L+PMIC

Hello, I am building coreboot image for Apollo Lake. My designed mainboard comes with DDR3L SODIMMs + PMIC. To my knowledge, RVP1 board is for DDR3L SODIMMs and discrete VRs. RVP2 board is for LPDDR3 and PMIC. If I selected under coreboot configuration: Mainboard --> Mainboard vendor (Intel)