[coreboot] payload build failure

Hello, I am facing the below failure while attempting to build the payload-coreinfo. make: Entering directory '/home/raghuveer/CodeBase/coreboot/payloads/coreinfo' Building libpayload @ /home/raghuveer/CodeBase/coreboot/payloads/libpayload. *** Default configuration is based on

[coreboot] Does the 62xx Series Opteron work *securely* without microcode?

I know the 63xx has a very fatal NMI exploit, but according to the libreboot (oh no) website the 62xx works safely out of the box without microcode however I would like to confirm if this is actually true. I looked at the errata .pdf from the AMD website but I didn't see anything that seemed

Re: [coreboot] Coreboot binary for ASUS F2A85-M

Using your ROM, I'm getting USB keyboard in both grub and linux. You might try setting SeaBIOS's usb-time-sigatt to something higher than 100: https://www.seabios.org/Runtime_config "The USB2 specification requires devices to signal that they are attached within 100ms of the USB port being

Re: [coreboot] ASUS KFSN4-DRE Automated Test Failure [master]

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 01/23/2017 01:48 PM, Timothy Pearson wrote: > On 01/23/2017 09:39 AM, Raptor Engineering Automated Coreboot Test Stand > wrote: >> The ASUS KFSN4-DRE fails verification for branch master as of commit >> 0f6d10ba8f8f711f2ff7fa5c8f306e18a42b8974 >

[coreboot] docs about porting new arch

Hello! I would like to port a new architecture to the coreboot. I have found a brief documentation about porting a new board or a new SoC. https://www.coreboot.org/git-docs/Intel/SoC/soc.html https://www.coreboot.org/git-docs/Intel/Board/board.html Is there the same docs about adding a new

Re: [coreboot] PECI temperature in lm-sensors

Hi! 2) I don't have secret PECI docs either, so I don't know what else should I do... Maybe the three peci.c files in 3rdparty/chromeec can help you. At least those contain the meaning of some of the magic values. 3) You're right, I want to configure SuperIO to control fans on motherboard

Re: [coreboot] Compiling coreboot with libgfxinit

Hi Nico, 2017-01-24 12:54 GMT+02:00 Nico Huber : > Hi Mihail, > > On 24.01.2017 11:35, Mihail Tommonen wrote: >> Hello Everyone, >> >> My intention is to get libgfxinit to work with Lenovo X230, but first >> I'm trying to get it compiled for KONTRON KTQM77 as its seems to

Re: [coreboot] PECI temperature in lm-sensors

1) Yes, PECI pin in SuperIO is actually configured as PECI pin and is connected to PECI pin on Haswell CPU 2) I don't have secret PECI docs either, so I don't know what else should I do... 3) You're right, I want to configure SuperIO to control fans on motherboard based on CPU temperature.

Re: [coreboot] Compiling coreboot with libgfxinit

Hi Mihail, On 24.01.2017 11:35, Mihail Tommonen wrote: > Hello Everyone, > > My intention is to get libgfxinit to work with Lenovo X230, but first > I'm trying to get it compiled for KONTRON KTQM77 as its seems to be > only board atm that has feature enabled in configs. > > Unfortunately I get

[coreboot] Compiling coreboot with libgfxinit

Hello Everyone, My intention is to get libgfxinit to work with Lenovo X230, but first I'm trying to get it compiled for KONTRON KTQM77 as its seems to be only board atm that has feature enabled in configs. Unfortunately I get a tons of "hw-time.ads:23:07: "Volatile_Function" is not a valid