[coreboot] FOSDEM 2018 beverage round?

[Daniel Kulesz via coreboot]

Hi folks,

I've read about the "discussion over beers or another prefered beverage" at 
FOSDEM 2018 a couple of days ago here on this list. Since I definitely plan to 
attend FOSDEM this year again (I got my talk in the testing and automation 
devroom accepted), I was wondering what the requirements for joining this 
bevereage round are and if there are already any concrete plans for that.

Cheers, Daniel

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Re: [coreboot] I want to be a contributor

[taii...@gmx.com]

On 01/18/2018 07:08 AM, 戴，曉政 via coreboot wrote:


Dear All,

I hope I can be a contributor in coreboot so I plan buy a mainboard and use 
tiano core to port it. Maybe ASUS P2B is a good idea

Isn't that board is from 1999? I don't think that would be useful.

I suggest the H8SCM ported to coreboot's native fam15h init, as you can 
pick one up for $30, they support IOMMU and the old but still fast 
enough to be useful C32 Opteron's.

but I have some question.
1. EC code doesn’t be included in coreboot, how can I include EC code into my 
coreboot bin file? Use ME?
EC is generally embedded on the motherboard and coreboot isn't that 
involved with it.

2. How can I get EC bin file from OEM bios

Not sure, I hope someone else will answer.

  and how can I get  VBIOS from OEM bios?

Instructions are on the wiki.

3. I have ME9, ME10 and ME11 firmware now, which ME I must use to integrate my 
coreboot rom and EC

Depends on the CPU version.
Of course if you are looking to learn you can also port a pre-PSP AMD 
board which doesn't need any of this, I suggest this as there are some 
very cheap and widely available board models that are still new enough 
to be worth doing.

I also suggest the ivy bridge xeon counterpart, that would also be useful.

4. How can I use SF-100 to flash bios into mainboard, welding jumper?
Hm? I use a USB CH341A with my removable dip8 chips and a test clip for 
the soic-8 chips.

5. Most coreboot projects don’t use tiano core to port them, but I am a OEM 
BIOS engineer and I already use tiano architecture 7 years, so I hope I can use 
tiano core to be payload, does everyone know which coreboot project does use 
tiano core to be payload?

You are able to pick a payload with any coreboot board.

P.S. Please forgive my poor English, thank!!

Welcome :D

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Re: [coreboot] x86 validation suite

[Zoran Stojsavljevic]

Nothing simpler, my dear friend Ron.

Do the following steps (on your
Linux/Debian/Ubuntu/OpenSUSE/RHEL/Fedora/Centos):
[1] Go to YOCTO project: https://www.yoctoproject.org
[2] Go to the following site: https://www.yoctoproject.org/downloads
[3] Do git clone Rocko: git clone -b rocko git://git.yoctoproject.org/poky.git
[4] Go to poky/ directory, do the following: . oe-init-build-env
[5] go to build/conf, and find there local.conf
[6] there are two variables there:
  #MACHINE ?= "qemux86"
  #MACHINE ?= 'qemux86-64"
[7] Un-comment one (whatever you need), save the file, exit from the
local.conf, and do the following
 bitbake -k core-image-minimal
[8] When it finishes (after 3 to 6 hours), do the: runqemu qemux86(-64),

U R all set!

Enjoy!
Zoran
___

On Thu, Jan 18, 2018 at 6:54 PM, ron minnich  wrote:
> Anybody out there know of an x86 emulation validation suite?
>
> thanks
>
> ron
>
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Re: [coreboot] Server systems shipped with coreboot

[awokd via coreboot]

On Thu, January 18, 2018 6:37 pm, Nico Huber wrote:


> Generally, you can expect microservers with coreboot nowadays (anything
> supported by Intel's IoT group).

If you're talking IoT range, AMD APU Coreboot can be seen at
http://www.pcengines.ch/apu2.htm for example.



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Re: [coreboot] x86 validation suite

[Igor Skochinsky via coreboot]

Hi Ron,

Thursday, January 18, 2018, 6:54:49 PM, you wrote:

rm> Anybody out there know of an x86 emulation validation suite?

There's test-i386.c in QEMU which seems to be quite complete.

I also found a paper "Design and Testing of a CPU Emulator" from
MS Research[1]. The mentioned Giano emulator can be downloaded here (MSI 
installer):

https://www.microsoft.com/en-us/download/details.aspx?id=52537

but I did not find the test suite from a quick look.

[1] 
https://www.microsoft.com/en-us/research/wp-content/uploads/2016/02/techeport20cpu_test20v4.pdf


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 Igormailto:skochin...@mail.ru


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Re: [coreboot] Server systems shipped with coreboot

[Nico Huber]

Hi Carl-Daniel,

On 16.01.2018 19:29, Carl-Daniel Hailfinger wrote:
> At 34C3 I was told by someone that a major vendor has been shipping
> servers with coreboot without announcing this, and I unfortunately
> neither remember the server model nor who told me about this. If said
> person could remind contact me, I'd be thankful.

it wasn't me. Though I remember somewhere around December somebody
reported DMI information on IRC from a cloud server running on an ADI
something from Adlink, likely some microserver. Also, not sure if
related, there where some questions from Dell employees on the ML last
year.

Generally, you can expect microservers with coreboot nowadays (anything
supported by Intel's IoT group). But no fully fledged powerful server
(which is still 100% unsupported by Intel). So if you are looking for
the latter, your options are (as mentioned before) stale AMD systems,
OpenPower (not coreboot but open), modern Intel (maybe AMD too?) servers
shipping with UEFI that you can reduce (NERF, not open but best boot
experience you can get with proprietary firmware (beside coreboot+blobs)
I guess).

If you are looking for microservers, I'd go around and ask. Starting
with Adlink.

Nico

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[coreboot] x86 validation suite

[ron minnich]

Anybody out there know of an x86 emulation validation suite?

thanks

ron
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Re: [coreboot] Server systems shipped with coreboot

[Julien Viard de Galbert]

Hello Felix, and all,

> Le 18 janv. 2018 à 04:17, Felix Held  a écrit :
> 
> Hi Carl-Daniel!
> 
>> At 34C3 I was told by someone that a major vendor has been shipping
>> servers with coreboot without announcing this, and I unfortunately
>> neither remember the server model nor who told me about this.
> This might be related: 
> https://www.fosdem.org/2018/schedule/event/hwenablement_open_source_bios_at_scale/
>  
> 

Well no, I don’t think it could be, or the person was not well informed.

We are not a vendor, but a hosting/cloud company, so we rent servers or service 
running on them, we do not ship them.
Also none of those servers with coreboot were available yet during 34C3.

Anyway, you are welcome to come to my talk at FOSDEM for more details ;-)

Best Regards,

Julien


> 
> Regards
> Felix
> 
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[coreboot] I want to be a contributor

[戴，曉政 via coreboot]

Dear All,

I hope I can be a contributor in coreboot so I plan buy a mainboard and use 
tiano core to port it. Maybe ASUS P2B is a good idea but I have some question.
1. EC code doesn’t be included in coreboot, how can I include EC code into my 
coreboot bin file? Use ME?
2. How can I get EC bin file from OEM bios and how can I get  VBIOS from OEM 
bios?
3. I have ME9, ME10 and ME11 firmware now, which ME I must use to integrate my 
coreboot rom and EC
4. How can I use SF-100 to flash bios into mainboard, welding jumper?
5. Most coreboot projects don’t use tiano core to port them, but I am a OEM 
BIOS engineer and I already use tiano architecture 7 years, so I hope I can use 
tiano core to be payload, does everyone know which coreboot project does use 
tiano core to be payload?

P.S. Please forgive my poor English, thank!!


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Re: [coreboot] Link layer between "coreboot" - "seabios" - "coreinfo/nvramcui"

[Аладышев Константин]

Last lines of log from SeaBIOS:

Run img/coreinfo.elf
Segment 45444f43 48469@0xfff6a770 -> 405328@0x0010
Uncompressing data 48469@0xfff6a770 to 405328@0x0010
Calling addr 0x0010


Best regards,
Aladyshev Konstantin

-Original Message-
From: Аладышев Константин [mailto:aladys...@nicevt.ru] 
Sent: Thursday, January 18, 2018 12:35 PM
To: 'Coreboot'
Subject: Link layer between "coreboot" - "seabios" - "coreinfo/nvramcui"

Hello! 
I have a project for my motherboard with coreboot version that I fixed
couple years back (so it is pretty old), and now I want to update all
payloads to most modern ones. There is no problem with SeaBIOS, but coreinfo
and nvramcui don't work. When I try to jump to them from SeaBIOS, nothing
happens and screen turns black. So... what is the link layer between those
payloads and coreboot? Layer that I should also update for those new
payloads to work fine?

Don't forget, this it is not only video problem, there is no output from COM
also. So maybe it is connected to CBFS or payload format? What should I
check?

Best regards,
Aladyshev Konstantin


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[coreboot] Link layer between "coreboot" - "seabios" - "coreinfo/nvramcui"

[Аладышев Константин]

Hello! 
I have a project for my motherboard with coreboot version that I fixed
couple years back (so it is pretty old), and now I want to update all
payloads to most modern ones. There is no problem with SeaBIOS, but coreinfo
and nvramcui don't work. When I try to jump to them from SeaBIOS, nothing
happens and screen turns black. So... what is the link layer between those
payloads and coreboot? Layer that I should also update for those new
payloads to work fine?

Don't forget, this it is not only video problem, there is no output from COM
also. So maybe it is connected to CBFS or payload format? What should I
check?

Best regards,
Aladyshev Konstantin


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