Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread Elisenda Cuadros
Hello Taiidan, I bought it used, but the seller was so kind to send me the module. It was a nice surprise. If you need high quality photos of this module or anything else, please donĀ“t hesitate to contact me. I will be happy to help. My cpu is 6238 not 6328, but thank you for your advise

[coreboot] External flashing PCI-e RAID card firmware

2018-02-14 Thread taii...@gmx.com
I am contemplating the purchase of an ASUS PIKE for my KGPE-D16 and I was wondering if anyone here knows if it is possible to externally re-flash them. I notice a SOIC-8 chip on the front of the card and I imagine the firmware is there, does it entail simply hooking up a test clip and using

Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread taii...@gmx.com
On 02/14/2018 06:08 PM, Elisenda Cuadros wrote: I have an ASMB4-iKVM. I think it's this, although it has two stickers and I can not see the concrete model If you got your D16 new it comes with one (so that is probably what you have) - its a tiny little module that attaches next to the PCI-e

Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread Elisenda Cuadros
Ok, thank you for the clarification. I thought the connector was needed to program the module. I have an ASMB4-iKVM. I think it's this, although it has two stickers and I can not see the concrete model Ok.. flashing is done with your flashrom version. Sorry for not reading the whole

Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread Timothy Pearson
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 To try the OpenBMC port you don't need to solder anything; you just need to find an ASMB4-iKVM module and program it. Soldering is for if you want access to the JTAG connector for low-level development (U-Boot development, mostly).

Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread Elisenda Cuadros
Yes, I cleaned the CPU before but it's obvious it wasn't shiny :-) . I want to try your OpenBMC port. I readed I have to solder the 20 pin connector. Pin 1 is the squared shape, isn't it? But which is Pin 1 in the female connector? Best regards, - Eli On 14/02/18 23:42, Timothy Pearson

Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread Timothy Pearson
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Good to hear. I was going to mention bad CPU but that seemed unlikely; on this end we always make sure the CPU contacts are shiny before attempting boot so that could explain the discrepancy. On 02/14/2018 04:38 PM, Elisenda Cuadros wrote: > Thank

Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread Elisenda Cuadros
Thank you for your reply Timothy. I removed the heatsink and cleaned the cpu contacts. Now it boots. Thank you for your support. Best regards, - Eli On 14/02/18 22:46, Timothy Pearson wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Dead / incompatible DIMM, DIMM(s) in wrong slots,

Re: [coreboot] New user of KGPE-D16

2018-02-14 Thread Timothy Pearson
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 Dead / incompatible DIMM, DIMM(s) in wrong slots, or damaged mainboard. The fact that the vendor BIOS won't post is a very bad sign, since in our experience the vendor BIOS is far more forgiving of faulty DIMMs than coreboot (basically, the vendor

[coreboot] New user of KGPE-D16

2018-02-14 Thread Elisenda Cuadros
Hello, I recently bought an Asus KGPE-D16 board, with an Opteron 6238 and 4 Micron MT18JSF25672PDZ-1G4F1DD modules. Firstly I tried to boot with vendor BIOS but I don't get any output on VGA. I have a PCI Post Card and it seems it arrives to 3E and then I think it enters in a loop. I

Re: [coreboot] inteltool and sys/io.h

2018-02-14 Thread Klemens Nanni
On Wed, Feb 14, 2018 at 11:11:46AM -0700, Trammell Hudson wrote: > When cross compiling inteltool with musl-libc the header > is not included due to this test in inteltool.h: > > #if defined(__GLIBC__) > #include > #endif Same story on other platforms: sys/io.h[1] is implemented through

Re: [coreboot] inteltool and sys/io.h

2018-02-14 Thread Jonathan A. Kollasch
On Wed, Feb 14, 2018 at 11:11:46AM -0700, Trammell Hudson wrote: > When cross compiling inteltool with musl-libc the header > is not included due to this test in inteltool.h: > > #if defined(__GLIBC__) > #include > #endif We should provide our own I/O space inlines. ISTR we do for nvramtool,

Re: [coreboot] inteltool and sys/io.h

2018-02-14 Thread ron minnich
why on earth is that test there? what does glibc have to do with whether you have sys/io.h? I suggest removing the guard. On Wed, Feb 14, 2018 at 10:12 AM Trammell Hudson wrote: > When cross compiling inteltool with musl-libc the header > is not included due to this test in

[coreboot] inteltool and sys/io.h

2018-02-14 Thread Trammell Hudson
When cross compiling inteltool with musl-libc the header is not included due to this test in inteltool.h: #if defined(__GLIBC__) #include #endif Unfortunately I'm not sure what the right test is here, since the musl libc team is opposed to having a __MUSL__ define:

Re: [coreboot] Asus AM1I-A

2018-02-14 Thread taii...@gmx.com
On 02/14/2018 01:40 AM, Gergely Kiss wrote: Maybe the best way to see this is to try virtualizing some hardware? Coreboot AGESA used on AM1 doesn't support IOMMU :[ and of course the default bios doesn't either. There is no IOMMU device in lspci/dmesg so passing hardware doesn't work. I