Re: [coreboot] Out of MTRRs

Please post the full logs so we can see the address space. The 'Unable to insert temporary MTRR range' log message is only for tempoarility mapping the SPI flash. However, it's impossible to debug w/o the full logs to see what your address space looks like. On Sat, Mar 17, 2018 at 12:28 PM, Jay

[coreboot] Out of MTRRs

I'm working on a coreboot solution for a SkyLake based board that uses SO-DIMMs. The plan is for two 8GB DIMMs, for a total of 16GB of RAM. But with two 8GB DIMMs installed, I get the following during the boot: Taking a reserved OS MTRR. Taking a reserved OS MTRR. Taking a reserved

Re: [coreboot] Gigabyte MB to Test

Hi Taiidan, I am not afraid about hard work and putting in the time. Mini ITX Thin Client. M.2 SSD, 2X mini pcie or 2X M. 2 Key or some combo, linux friendly. Regards with thanks, Jeff. On Fri, Mar 16, 2018, 7:26 PM taii...@gmx.com wrote: > Like nico said it would be quite