> So you are saying that sandy and ivybridge have spectre microcode
> updates?
>
> I hate how unclear intel is about this.
https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
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Merlin Büge
--
coreboot mailing list: coreboot@coreboot.org
So you are saying that sandy and ivybridge have spectre microcode updates?
I hate how unclear intel is about this.
How do I patch my coreboot?
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On Mon, Mar 19, 2018 at 10:55 AM, Jay Talbott
wrote:
> See below…
> - Jay
>
[Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=79fff000 End=7a00
(Size 1000)
[Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7a00 End=7a80
(Size 80)
[Mon Mar 19
Am 14.03.2018 22:46 schrieb David Hobach:
On 01/11/2018 03:55 AM, taii...@gmx.com wrote:
I am curious of any intel insiders know if there will be microcode
updates released for older intel CPU's (ex: sandy/ivybridge) and
failing that, what can be done in regards to securing them from
Am 18.03.2018 23:42 schrieb Marek Behun:
Hello,
with the commit 7539b8c3 "nb/intel/sandybridge: Use common mrc cache
functions" I only have accessible 8 GB of ram on ThinkPad X230,
although I have two 8 GB modules. On the previous commit whole 16 GB is
visible.
Marek
I'm running cb9f55ec38
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