[coreboot] Hidden PCI device question (from 4.13 release notes)

Hi, Unsure if appending to the 4.13 announcement email was cool, so here's a separate thread. I was using coreboot for a while, but then discovered that something about it was not accessing hidden PCI devices correctly (not enough expertise to figure out what). In my particular case, I'm adding

[coreboot] Re: Announcing coreboot 4.13

awesome, great job getting this out the door Angel. And now that you've shown competence in doing so, know that you've now inhereted the job for the foreseeable future ;-) cheers, Matt On Fri, Nov 20, 2020, 10:28 AM Angel Pons wrote: > Hi everyone, > > I'm pleased to announce that coreboot

[coreboot] Announcing coreboot 4.13

Hi everyone, I'm pleased to announce that coreboot 4.13 has just been released, with release notes as follows: Since 4.12 there were 4200 new commits by over 234 developers. Of these, about 72 contributed to coreboot for the first time. Thank you to all developers who again helped made

[coreboot] New Defects reported by Coverity Scan for coreboot

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1436518: Error handling issues (CHECKED_RETURN)

[coreboot] Re: Undepend on vboot [was: System gcc requirements]

> CONFIG_VBOOT enables vboot, the verified boot scheme. The issue here is the > submodule, which is drawn in through CONFIG_VBOOT_LIB. Why is this an issue? CONFIG_VBOOT_LIB isn't set either! Furthermore it is pretty clear to me that if CONFIG_VBOOT is not set, then no vboot related code should

[coreboot] Re: System gcc requirements

Am Do., 19. Nov. 2020 um 18:32 Uhr schrieb Peter Stuge : > Patrick Georgi via coreboot wrote: > > > My argument is solely on complexity, but please don't trust that hash > too > > > much. > > > > If I shouldn't trust > > "16 commit 4c523ed10f25de872ac0513ebd6ca53d3970b9de vboot" too much, > >

[coreboot] Re: Memory initialisation error

Naresh wrote... To understand the exact failure cause in FSPM, you need to get post code from FSP. What is printed in log is Coreboot post code only. Is it possible to get the post code from FSPM without a hardware POST code indicator? The hardware I am using only has an M.2 slot (used for