> > https://review.coreboot.org/c/coreboot/+/51825 proposes getting rid of the
> > rule to make if-statement blocks (and the like) as short as possible.
> > The rationale is to encourage a style that avoids subtle bugs which then
> > need to be found by tooling such as Coverity Scan and fixed by
Hello!
Actually folks I am going to support both ones. There are reasons, but
I'm not prepared to go into them now.
-
Gregg C Levine gregg.drw...@gmail.com
"This signature fought the Time Wars, time and again."
On Thu, Mar 25, 2021 at 6:23 PM Patrick Georgi via coreboot
wrote:
>
> Hello
Hello everybody,
https://review.coreboot.org/c/coreboot/+/51825 proposes getting rid of the
rule to make if-statement blocks (and the like) as short as possible.
The rationale is to encourage a style that avoids subtle bugs which then
need to be found by tooling such as Coverity Scan and fixed by
I think the only way to prevent the current leaking to the surrounding
elements of a chip - is desoldering. So, if we are trying to avoid the
desoldering - yes, you could try reducing the length of wires between
a programmer and a test clip - i.e. to 10cm. That certainly wouldn't
hurt, and
Hi,
I found a problem with keeping RTC time on reboot or power off even if battery
is connected.
The soc_get_rtc_failed routine in pmutil.c of apollolake SOC does not read and
reset after read the General PM Configuration 1 register.
As a result RTC always failed.
Is there any Konfig what I
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