Oh, there's not currently a battery installed - so that would do it. Thanks
for a lead.
What's the path to fixing that? Different EC blob extracted from stock
BIOS, something in Coreboot to check?
R
Am Do., 12. Jan. 2023 um 09:11 Uhr schrieb Matt DeVillier <
matt.devill...@gmail.com>:
> sounds
sounds to me like AP shutdown is causing the EC to power off as well, so
it's not active to respond to the subsequent power button press. Not sure
why disconnecting AC power would reset that though, unless you are also
disconnecting the internal battery as well
On Thu, Jan 12, 2023 at 11:08 AM
Hi,
As folks may have gathered from my other question about the GCC build
environment, I've been playing around with the old X2100 port (
https://github.com/mjg59/coreboot/tree/x2100_ng).
I got it to build and added the latest version of MrChromebox's Tianocore,
but there's still one issue that
Hi all
On most modern x86 systems a lot of the silicon init happens as part of
blob (FSP, binaryPI)
or some reference code (AGESA). Very often that silicon init enables or
hides
PCI devices. This means that this code needs to run before coreboot device
enumeration code.
With coreboot's current
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